[PATCH] D139119: [AArch64][SVE2p1] Make use of REVD instruction.

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 5 10:25:30 PST 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10589
+          BlockSize == 128) &&
          "Only possible block sizes for REV are: 16, 32, 64");
 
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Please update the string to include the new block size.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:10592-10593
   unsigned EltSz = VT.getScalarSizeInBits();
-  if (EltSz == 64)
+  if (BlockSize != 128 && EltSz == 64)
     return false;
 
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Perhaps this block can be removed? There's the `BlockSize <= EltSz` check just below which seems to handle this?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139119/new/

https://reviews.llvm.org/D139119



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