[llvm] 18cae67 - [Instcombine] Precommit tests for D139080; NFC

via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 5 08:23:55 PST 2022


Author: chenglin.bi
Date: 2022-12-06T00:23:28+08:00
New Revision: 18cae673a4b14028231fc4201d9044d454b83359

URL: https://github.com/llvm/llvm-project/commit/18cae673a4b14028231fc4201d9044d454b83359
DIFF: https://github.com/llvm/llvm-project/commit/18cae673a4b14028231fc4201d9044d454b83359.diff

LOG: [Instcombine] Precommit tests for D139080; NFC
Test pattern for
(C & X) | ~(C | Y) -> C ? X : ~Y

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/logical-select.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/logical-select.ll b/llvm/test/Transforms/InstCombine/logical-select.ll
index 4a11335964ba..7e70369c1fe6 100644
--- a/llvm/test/Transforms/InstCombine/logical-select.ll
+++ b/llvm/test/Transforms/InstCombine/logical-select.ll
@@ -988,3 +988,148 @@ define <2 x i1> @xor_commute3(<2 x i1> %x, <2 x i1> %y) {
   %and2 = select <2 x i1> %or, <2 x i1> %nand, <2 x i1> <i1 false, i1 false>
   ret <2 x i1> %and2
 }
+
+define i1 @not_d_bools_commute00(i1 %c, i1 %x, i1 %y) {
+; CHECK-LABEL: @not_d_bools_commute00(
+; CHECK-NEXT:    [[Y_C:%.*]] = or i1 [[C:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor i1 [[Y_C]], true
+; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[C]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[AND1]], [[AND2]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %y_c = or i1 %c, %y
+  %and2 = xor i1 %y_c, true
+  %and1 = and i1 %c, %x
+  %r = or i1 %and1, %and2
+  ret i1 %r
+}
+
+define i1 @not_d_bools_commute01(i1 %c, i1 %x, i1 %y) {
+; CHECK-LABEL: @not_d_bools_commute01(
+; CHECK-NEXT:    [[Y_C:%.*]] = or i1 [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor i1 [[Y_C]], true
+; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[C]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[AND1]], [[AND2]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %y_c = or i1 %y, %c
+  %and2 = xor i1 %y_c, true
+  %and1 = and i1 %c, %x
+  %r = or i1 %and1, %and2
+  ret i1 %r
+}
+
+define i1 @not_d_bools_commute10(i1 %c, i1 %x, i1 %y) {
+; CHECK-LABEL: @not_d_bools_commute10(
+; CHECK-NEXT:    [[Y_C:%.*]] = or i1 [[C:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor i1 [[Y_C]], true
+; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[X:%.*]], [[C]]
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[AND1]], [[AND2]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %y_c = or i1 %c, %y
+  %and2 = xor i1 %y_c, true
+  %and1 = and i1 %x, %c
+  %r = or i1 %and1, %and2
+  ret i1 %r
+}
+
+define i1 @not_d_bools_commute11(i1 %c, i1 %x, i1 %y) {
+; CHECK-LABEL: @not_d_bools_commute11(
+; CHECK-NEXT:    [[Y_C:%.*]] = or i1 [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor i1 [[Y_C]], true
+; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[X:%.*]], [[C]]
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[AND1]], [[AND2]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %y_c = or i1 %y, %c
+  %and2 = xor i1 %y_c, true
+  %and1 = and i1 %x, %c
+  %r = or i1 %and1, %and2
+  ret i1 %r
+}
+
+define <2 x i1> @not_d_bools_vector(<2 x i1> %c, <2 x i1> %x, <2 x i1> %y) {
+; CHECK-LABEL: @not_d_bools_vector(
+; CHECK-NEXT:    [[Y_C:%.*]] = or <2 x i1> [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor <2 x i1> [[Y_C]], <i1 true, i1 true>
+; CHECK-NEXT:    [[AND1:%.*]] = and <2 x i1> [[X:%.*]], [[C]]
+; CHECK-NEXT:    [[R:%.*]] = or <2 x i1> [[AND1]], [[AND2]]
+; CHECK-NEXT:    ret <2 x i1> [[R]]
+;
+  %y_c = or <2 x i1> %y, %c
+  %and2 = xor <2 x i1> %y_c, <i1 true, i1 true>
+  %and1 = and <2 x i1> %x, %c
+  %r = or <2 x i1> %and1, %and2
+  ret <2 x i1> %r
+}
+
+define <2 x i1> @not_d_bools_vector_poison(<2 x i1> %c, <2 x i1> %x, <2 x i1> %y) {
+; CHECK-LABEL: @not_d_bools_vector_poison(
+; CHECK-NEXT:    [[Y_C:%.*]] = or <2 x i1> [[Y:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor <2 x i1> [[Y_C]], <i1 poison, i1 true>
+; CHECK-NEXT:    [[AND1:%.*]] = and <2 x i1> [[X:%.*]], [[C]]
+; CHECK-NEXT:    [[R:%.*]] = or <2 x i1> [[AND1]], [[AND2]]
+; CHECK-NEXT:    ret <2 x i1> [[R]]
+;
+  %y_c = or <2 x i1> %y, %c
+  %and2 = xor <2 x i1> %y_c, <i1 poison, i1 true>
+  %and1 = and <2 x i1> %x, %c
+  %r = or <2 x i1> %and1, %and2
+  ret <2 x i1> %r
+}
+
+define i32 @not_d_allSignBits(i32 %cond, i32 %tval, i32 %fval) {
+; CHECK-LABEL: @not_d_allSignBits(
+; CHECK-NEXT:    [[BITMASK:%.*]] = ashr i32 [[COND:%.*]], 31
+; CHECK-NEXT:    [[A1:%.*]] = and i32 [[BITMASK]], [[TVAL:%.*]]
+; CHECK-NEXT:    [[OR:%.*]] = or i32 [[BITMASK]], [[FVAL:%.*]]
+; CHECK-NEXT:    [[A2:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:    [[SEL:%.*]] = or i32 [[A1]], [[A2]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %bitmask = ashr i32 %cond, 31
+  %a1 = and i32 %tval, %bitmask
+  %or = or i32 %bitmask, %fval
+  %a2 = xor i32 %or, -1
+  %sel = or i32 %a1, %a2
+  ret i32 %sel
+}
+
+define i1 @not_d_bools_use2(i1 %c, i1 %x, i1 %y) {
+; CHECK-LABEL: @not_d_bools_use2(
+; CHECK-NEXT:    [[Y_C:%.*]] = or i1 [[C:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor i1 [[Y_C]], true
+; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[C]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[AND1]], [[AND2]]
+; CHECK-NEXT:    call void @use1(i1 [[AND1]])
+; CHECK-NEXT:    call void @use1(i1 [[Y_C]])
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %y_c = or i1 %c, %y
+  %and2 = xor i1 %y_c, true
+  %and1 = and i1 %c, %x
+  %r = or i1 %and1, %and2
+  call void @use1(i1 %and1)
+  call void @use1(i1 %y_c)
+  ret i1 %r
+}
+
+define i1 @not_d_bools_negative_use2(i1 %c, i1 %x, i1 %y) {
+; CHECK-LABEL: @not_d_bools_negative_use2(
+; CHECK-NEXT:    [[Y_C:%.*]] = or i1 [[C:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[AND2:%.*]] = xor i1 [[Y_C]], true
+; CHECK-NEXT:    [[AND1:%.*]] = and i1 [[C]], [[X:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[AND1]], [[AND2]]
+; CHECK-NEXT:    call void @use1(i1 [[AND2]])
+; CHECK-NEXT:    call void @use1(i1 [[AND1]])
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %y_c = or i1 %c, %y
+  %and2 = xor i1 %y_c, true
+  %and1 = and i1 %c, %x
+  %r = or i1 %and1, %and2
+  call void @use1(i1 %and2)
+  call void @use1(i1 %and1)
+  ret i1 %r
+}


        


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