[PATCH] D138811: [AArch64] SelectionDag codegen for gpr CTZ instruction

[Ties Stuij via Phabricator via llvm-commits]

stuij marked an inline comment as done.
stuij added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/gpr_cttz.ll:146
+define i64 @cttz64combine(i64 %x) nounwind readnone {
+  %rev = tail call i64 @llvm.bitreverse.i64(i64 %x)
+  %ctz = tail call i64 @llvm.ctlz.i64(i64 %rev)
----------------
lenary wrote:
> how does this testcase have no CHECK lines?
I... don't know.
Added, thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138811/new/

https://reviews.llvm.org/D138811