[llvm] 453eb9e - [AMDGPU][MC] Correct handling of mandatory literals
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 5 05:23:58 PST 2022
Author: Dmitry Preobrazhensky
Date: 2022-12-05T16:23:47+03:00
New Revision: 453eb9eb4281feb130470198aa5bcc5b5cfafe91
URL: https://github.com/llvm/llvm-project/commit/453eb9eb4281feb130470198aa5bcc5b5cfafe91
DIFF: https://github.com/llvm/llvm-project/commit/453eb9eb4281feb130470198aa5bcc5b5cfafe91.diff
LOG: [AMDGPU][MC] Correct handling of mandatory literals
Differential Revision: https://reviews.llvm.org/D138661
Added:
llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
Modified:
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
llvm/test/MC/AMDGPU/gfx10_asm_err.s
llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
llvm/test/MC/AMDGPU/literals.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 1adf2a75819a2..693e02c0dd769 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -3378,7 +3378,8 @@ bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst,
unsigned OpIdx) const {
const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
- if (!AMDGPU::isSISrcOperand(Desc, OpIdx)) {
+ if (!AMDGPU::isSISrcOperand(Desc, OpIdx) ||
+ AMDGPU::isKImmOperand(Desc, OpIdx)) {
return false;
}
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 3cf91d14cd914..519cea1730ed9 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -203,6 +203,9 @@ enum OperandType : unsigned {
OPERAND_SRC_FIRST = OPERAND_REG_IMM_INT32,
OPERAND_SRC_LAST = OPERAND_REG_INLINE_C_LAST,
+ OPERAND_KIMM_FIRST = OPERAND_KIMM32,
+ OPERAND_KIMM_LAST = OPERAND_KIMM16,
+
// Operand for source modifiers for VOP instructions
OPERAND_INPUT_MODS,
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index 2a5834c64d2fa..9616464d5414f 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -2083,6 +2083,13 @@ bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo) {
OpType <= AMDGPU::OPERAND_SRC_LAST;
}
+bool isKImmOperand(const MCInstrDesc &Desc, unsigned OpNo) {
+ assert(OpNo < Desc.NumOperands);
+ unsigned OpType = Desc.OpInfo[OpNo].OperandType;
+ return OpType >= AMDGPU::OPERAND_KIMM_FIRST &&
+ OpType <= AMDGPU::OPERAND_KIMM_LAST;
+}
+
bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo) {
assert(OpNo < Desc.NumOperands);
unsigned OpType = Desc.OpInfo[OpNo].OperandType;
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
index 90c771513a613..82704dd55d9a5 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
@@ -1126,9 +1126,13 @@ unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI);
LLVM_READNONE
unsigned mc2PseudoReg(unsigned Reg);
-/// Can this operand also contain immediate values?
+/// Is this an AMDGPU specific source operand? These include registers,
+/// inline constants, literals and mandatory literals (KImm).
bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo);
+/// Is this a KImm operand?
+bool isKImmOperand(const MCInstrDesc &Desc, unsigned OpNo);
+
/// Is this floating-point operand?
bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo);
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_err.s b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
index b2a7065b2e543..590504b73114e 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_err.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_err.s
@@ -294,6 +294,22 @@ v_fmamk_f32 v0, 0xff32, 0x1122, v0
// GFX6-9: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX10: :[[@LINE-2]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+v_fmaak_f32 v0, 0xff32, v0, 0
+// GFX6-9: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
+// GFX10: :[[@LINE-2]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
+v_fmaak_f16 v0, 0xff32, v0, 0
+// GFX6-9: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
+// GFX10: :[[@LINE-2]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
+v_fmamk_f32 v0, 0xff32, 1, v0
+// GFX6-9: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
+// GFX10: :[[@LINE-2]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
+v_fmamk_f16 v0, 0xff32, 1, v0
+// GFX6-9: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
+// GFX10: :[[@LINE-2]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
//===----------------------------------------------------------------------===//
// VOP2 E64.
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
new file mode 100644
index 0000000000000..fc08dff0c2f76
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_err.s
@@ -0,0 +1,13 @@
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck --check-prefix=GFX11 --implicit-check-not=error: %s
+
+v_fmaak_f32 v0, 0xff32, v0, 0
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
+v_fmaak_f16 v0, 0xff32, v0, 0
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
+v_fmamk_f32 v0, 0xff32, 1, v0
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+
+v_fmamk_f16 v0, 0xff32, 1, v0
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
index cb9d4258fea7b..4fc954cb32e4e 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s
@@ -39,6 +39,31 @@ v_dual_fmamk_f32 v122, 0xdeadbeef, 0xdeadbeef, v161 :: v_dual_fmamk_f32 v12
// GFX11-NEXT:{{^}}v_dual_fmamk_f32 v122, 0xdeadbeef, 0xdeadbeef, v161 :: v_dual_fmamk_f32 v123, s0, 0x1234, v162
// GFX11-NEXT:{{^}} ^
+//===----------------------------------------------------------------------===//
+// Check that KImm operands are counted as literals
+// even if they look like inline constants.
+//===----------------------------------------------------------------------===//
+
+v_dual_fmamk_f32 v122, v74, 0, v161 :: v_dual_lshlrev_b32 v247, 0xbabe, v99
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+// GFX11-NEXT:{{^}}v_dual_fmamk_f32 v122, v74, 0, v161 :: v_dual_lshlrev_b32 v247, 0xbabe, v99
+// GFX11-NEXT:{{^}} ^
+
+v_dual_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 1.0
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+// GFX11-NEXT:{{^}}v_dual_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 1.0
+// GFX11-NEXT:{{^}} ^
+
+v_dual_fmamk_f32 v122, 0xdeadbeef, 2, v161 :: v_dual_fmamk_f32 v123, s0, 1, v162
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+// GFX11-NEXT:{{^}}v_dual_fmamk_f32 v122, 0xdeadbeef, 2, v161 :: v_dual_fmamk_f32 v123, s0, 1, v162
+// GFX11-NEXT:{{^}} ^
+
+v_dual_fmamk_f32 v122, v1, 2, v161 :: v_dual_fmamk_f32 v123, s0, 1, v162
+// GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+// GFX11-NEXT:{{^}}v_dual_fmamk_f32 v122, v1, 2, v161 :: v_dual_fmamk_f32 v123, s0, 1, v162
+// GFX11-NEXT:{{^}} ^
+
//===----------------------------------------------------------------------===//
// Check that assembler detects a
diff erent literal regardless of its location.
//===----------------------------------------------------------------------===//
diff --git a/llvm/test/MC/AMDGPU/literals.s b/llvm/test/MC/AMDGPU/literals.s
index 84da053b4c11a..e37a4f9a404b6 100644
--- a/llvm/test/MC/AMDGPU/literals.s
+++ b/llvm/test/MC/AMDGPU/literals.s
@@ -846,17 +846,31 @@ v_madak_f32 v0, scc, v0, 0x11213141
// NOGCN: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
v_madak_f32 v0, 0xff32ff, v0, 0x11213141
+// NOGCN: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+v_madak_f32 v0, 0xff32ff, v0, 1
+
// NOGCN: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
v_madmk_f32 v0, 0xff32ff, 0x11213141, v0
+// NOGCN: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+v_madmk_f32 v0, 0xff32ff, -1, v0
+
// NOSICI: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// NOGFX89: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
v_madak_f16 v0, 0xff32, v0, 0x1122
+// NOSICI: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+v_madak_f16 v0, 0xff32, v0, 0
+
// NOSICI: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// NOGFX89: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
v_madmk_f16 v0, 0xff32, 0x1122, v0
+// NOSICI: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
+// NOGFX89: :[[@LINE+1]]:{{[0-9]+}}: error: only one unique literal operand is allowed
+v_madmk_f16 v0, 0xff32, 1, v0
+
// NOSICIVI: :[[@LINE+2]]:{{[0-9]+}}: error: register not available on this GPU
// NOGFX9: :[[@LINE+1]]:{{[0-9]+}}: error: invalid operand (violates constant bus restrictions)
v_cmp_eq_f32 s[0:1], private_base, private_limit
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