[PATCH] D139301: [X86] Add scheduling info of CodeGenOnly but encodable instructions for AlderlakeP model

[Haohai, Wen via Phabricator via llvm-commits]

HaohaiWen added a subscriber: andreadb.
HaohaiWen added inline comments.


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Comment at: llvm/lib/Target/X86/X86SchedAlderlakeP.td:532
 }
-def : InstRW<[ADLPWriteResGroup2], (instregex "^JMP(16|32|64)m$",
+def : InstRW<[ADLPWriteResGroup2], (instregex "^JMP(16|32|64)m((_NT)?)$",
                                               "^RET(16|32)$",
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RKSimon wrote:
> why ((_NT)?) and not (_NT)?
It's consistent with pattern like (V?), (Y?).
Actually, all ? is surrounded by ().


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Comment at: llvm/lib/Target/X86/X86SchedAlderlakeP.td:812-814
+def : InstRW<[ADLPWriteResGroup38, ReadInt2Fpu], (instrs CVTSI642SSrr)>;
+def : InstRW<[ADLPWriteResGroup38, ReadDefault, ReadInt2Fpu], (instregex "^(V?)CVTSI642SSrr_Int$")>;
+def : InstRW<[ADLPWriteResGroup38, ReadDefault, ReadInt2Fpu], (instrs VCVTSI642SSrr)>;
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RKSimon wrote:
> HaohaiWen wrote:
> > CVTSI642SSrr has different schedreadwrite with CVTSI642SSrr_Int?
> > I think they should be same.
> Difference between sse12_cvt_s and sse12_vcvt_avx that are getting interpreted differently for some reason?
Hi @andreadb, could you please answer RKSimon's question? I noticed you edited it in D57148.


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https://reviews.llvm.org/D139301