[PATCH] D139303: [LoongArch] Add custom parser for atomic instructions' memory operand

[wanglei via Phabricator via llvm-commits]

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1. In order to be compatible with the form of the atomic instruction in

GAS that accepts the fourth operand as 0 (i.e. `am* $rd, $rk, $rj, 0`),
we need to treat `$rj, 0` as one operand, but only print `$rj`.

2. Modified the number of result operands of inline assembly memory

operand `ZB` constraint to 2 (reg + 0).

3. Restrictions on register usage in `am*` instructions have also been

adjusted. When `$rd` is equal to `R0`, the instruction must be
considered legal, because of some special usage, eg: PseudoUNIMP.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139303

Files:
  llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
  llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
  llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
  llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
  llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
  llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
  llvm/test/CodeGen/LoongArch/inline-asm-constraint-ZB.ll
  llvm/test/MC/LoongArch/Basic/Integer/atomic.s
  llvm/test/MC/LoongArch/Basic/Integer/invalid64.s

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