[PATCH] D138844: [PowerPC] Materialize floats in the range [-16.0, 15.0].

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp added a comment.

I would like to address the following comment because it is not at all obvious why I decided not to go with this approach.

  This looks wrong. This will produce a pair of 32-bit single precision values in the FP portion of the VSX register. What you want is a 64-bit double precision value in each doubleword.
  Don't forget that single precision values on PPC are in registers as double precison but rounded to single precision (i.e. a double precision representation of a single precision value).
  I think you should use scalar instructions for scalar values (xscvsxdsp, xscvsxddp).

The instruction that does the integer splat is `vspltisw` which puts the same copy of the integer in every word of the vector. The scalar instructions `xscvsxdsp, xscvsxddp` look at double word entries and not word entries so they cannot be used to convert the word integers into floats.
There is no double word version of an instruction like`vspltisw` to go with  `xscvsxdsp, xscvsxddp`. Likewise, to my knowledge, there is no word instruction for the scalar convert. 
To get around this issue the vector word convert was used `xvcvsxwdp`. This works for both double and single precision because we know exactly which constants we are representing and we know that they can be exactly represented in both `float` and `double`.


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https://reviews.llvm.org/D138844