[PATCH] D139037: [RISCV] Fold low 12 bits into instruction during frame index elimination

[Philip Reames via Phabricator via llvm-commits]

reames updated this revision to Diff 479362.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139037/new/

https://reviews.llvm.org/D139037

Files:
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/test/CodeGen/RISCV/branch-relaxation.ll
  llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
  llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
  llvm/test/CodeGen/RISCV/pr58286.ll
  llvm/test/CodeGen/RISCV/vararg.ll

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