[llvm] 7850ab2 - [NFC] Port an assortment of tests that invoke SROA to new pass manager
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 1 10:17:33 PST 2022
Author: Roman Lebedev
Date: 2022-12-01T21:17:18+03:00
New Revision: 7850ab21128875611dead7d312ffbe4c8b47a5f2
URL: https://github.com/llvm/llvm-project/commit/7850ab21128875611dead7d312ffbe4c8b47a5f2
DIFF: https://github.com/llvm/llvm-project/commit/7850ab21128875611dead7d312ffbe4c8b47a5f2.diff
LOG: [NFC] Port an assortment of tests that invoke SROA to new pass manager
Added:
Modified:
llvm/test/Analysis/MemorySSA/pr39197.ll
llvm/test/CodeGen/AMDGPU/unroll.ll
llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll
llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
llvm/test/CodeGen/AMDGPU/vector-alloca.ll
llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
llvm/test/CodeGen/X86/vec_ins_extract.ll
llvm/test/DebugInfo/ARM/sroa-complex.ll
llvm/test/DebugInfo/Generic/sroa-larger.ll
llvm/test/DebugInfo/Generic/sroa-samesize.ll
llvm/test/DebugInfo/X86/sroa-after-inlining.ll
llvm/test/DebugInfo/X86/sroasplit-1.ll
llvm/test/DebugInfo/X86/sroasplit-2.ll
llvm/test/DebugInfo/X86/sroasplit-3.ll
llvm/test/DebugInfo/X86/sroasplit-4.ll
llvm/test/DebugInfo/X86/sroasplit-5.ll
llvm/test/DebugInfo/X86/sroasplit-dbg-declare.ll
llvm/test/DebugInfo/debugify-each.ll
llvm/test/DebugInfo/salvage-overflow.ll
llvm/test/Transforms/ADCE/2016-09-06.ll
llvm/test/Transforms/AddDiscriminators/memcpy-discriminator.ll
llvm/test/Transforms/Inline/basictest.ll
llvm/test/Transforms/Inline/crash2.ll
llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
llvm/test/Transforms/LICM/volatile-alias.ll
llvm/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
llvm/test/Transforms/SimpleLoopUnswitch/2011-09-26-EHCrash.ll
llvm/test/Transforms/Util/dbg-user-of-aext.ll
Removed:
################################################################################
diff --git a/llvm/test/Analysis/MemorySSA/pr39197.ll b/llvm/test/Analysis/MemorySSA/pr39197.ll
index 2741509fdbf4e..b52444feb8ffe 100644
--- a/llvm/test/Analysis/MemorySSA/pr39197.ll
+++ b/llvm/test/Analysis/MemorySSA/pr39197.ll
@@ -1,4 +1,4 @@
-; RUN: opt -mtriple=s390x-linux-gnu -mcpu=z13 -verify-memoryssa -sroa -globalopt -function-attrs -simplifycfg -licm -simple-loop-unswitch %s -S | FileCheck %s
+; RUN: opt -mtriple=s390x-linux-gnu -mcpu=z13 -verify-memoryssa -passes='function(sroa),globalopt,function-attrs,function(simplifycfg,loop-mssa(licm),loop(simple-loop-unswitch))' %s -S | FileCheck %s
; REQUIRES: asserts
target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
diff --git a/llvm/test/CodeGen/AMDGPU/unroll.ll b/llvm/test/CodeGen/AMDGPU/unroll.ll
index e05021d53e429..582ffa5ccab36 100644
--- a/llvm/test/CodeGen/AMDGPU/unroll.ll
+++ b/llvm/test/CodeGen/AMDGPU/unroll.ll
@@ -1,5 +1,5 @@
-; RUN: opt -mtriple=amdgcn-- -loop-unroll -simplifycfg -sroa %s -S -o - | FileCheck %s
-; RUN: opt -mtriple=r600-- -loop-unroll -simplifycfg -sroa %s -S -o - | FileCheck %s
+; RUN: opt -mtriple=amdgcn-- -passes='loop-unroll,simplifycfg,sroa' %s -S -o - | FileCheck %s
+; RUN: opt -mtriple=r600-- -passes='loop-unroll,simplifycfg,sroa' %s -S -o - | FileCheck %s
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
diff --git a/llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll b/llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
index 6e48f10ac2c52..d11e348682c86 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -passes=amdgpu-promote-alloca,sroa,instcombine < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
; Should give up promoting alloca to vector with an addrspacecast.
diff --git a/llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll b/llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll
index d0107ec239271..8e4cc2b0236c0 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -passes=amdgpu-promote-alloca,sroa,instcombine < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
; Show that what the alloca promotion pass will do for non-atomic load/store.
diff --git a/llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll b/llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
index b1d6deadc9076..f91b5d6c2cbfe 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
@@ -1,6 +1,6 @@
; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefixes=GCN,GCN-ALLOCA %s
; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefixes=GCN,GCN-PROMOTE %s
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-promote-alloca,sroa,instcombine < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
target datalayout = "A5"
diff --git a/llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll b/llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
index 1060ff777c31f..3afc22a5fac2e 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
@@ -1,5 +1,5 @@
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-promote-alloca,sroa,instcombine < %s | FileCheck -check-prefix=OPT %s
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-promote-alloca,sroa,instcombine -amdgpu-promote-alloca-to-vector-limit=32 < %s | FileCheck -check-prefix=LIMIT32 %s
+; RUN: opt -S -mtriple=amdgcn-- -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -passes='amdgpu-promote-alloca,sroa,instcombine' -amdgpu-promote-alloca-to-vector-limit=32 < %s | FileCheck -check-prefix=LIMIT32 %s
target datalayout = "A5"
diff --git a/llvm/test/CodeGen/AMDGPU/vector-alloca.ll b/llvm/test/CodeGen/AMDGPU/vector-alloca.ll
index 20e544dc4b5af..f726171707b1b 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-alloca.ll
+++ b/llvm/test/CodeGen/AMDGPU/vector-alloca.ll
@@ -3,8 +3,8 @@
; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mtriple=amdgcn-- -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC %s
; RUN: llc -march=r600 -mtriple=r600-- -mcpu=redwood < %s | FileCheck --check-prefixes=EG,FUNC %s
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-promote-alloca,sroa,instcombine < %s | FileCheck -check-prefix=OPT %s
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-promote-alloca,sroa,instcombine < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -S -mtriple=amdgcn-- -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
target datalayout = "A5"
; OPT-LABEL: @vector_read(
diff --git a/llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll b/llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
index d22f8102f14b8..5c0f721eed98f 100644
--- a/llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
+++ b/llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
@@ -5,7 +5,7 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-BE
-; RUN: opt --passes=sroa,loop-vectorize,loop-unroll,instcombine -S \
+; RUN: opt --passes='sroa,loop-vectorize,loop-unroll,instcombine' -S \
; RUN: -vectorizer-maximize-bandwidth --mtriple=powerpc64le-- -mcpu=pwr10 < %s | \
; RUN: FileCheck %s --check-prefix=CHECK-OPT
diff --git a/llvm/test/CodeGen/X86/vec_ins_extract.ll b/llvm/test/CodeGen/X86/vec_ins_extract.ll
index 39b3a31b5e062..a04a27c2146c8 100644
--- a/llvm/test/CodeGen/X86/vec_ins_extract.ll
+++ b/llvm/test/CodeGen/X86/vec_ins_extract.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: opt < %s -sroa -instcombine | \
+; RUN: opt < %s -passes='sroa,instcombine' | \
; RUN: llc -mtriple=i686-- -mcpu=yonah | not grep sub.*esp
; This checks that various insert/extract idiom work without going to the
diff --git a/llvm/test/DebugInfo/ARM/sroa-complex.ll b/llvm/test/DebugInfo/ARM/sroa-complex.ll
index 9c92218845c7f..ab0b2aa96cf9d 100644
--- a/llvm/test/DebugInfo/ARM/sroa-complex.ll
+++ b/llvm/test/DebugInfo/ARM/sroa-complex.ll
@@ -1,4 +1,4 @@
-; RUN: opt -sroa -S -o - %s | FileCheck %s
+; RUN: opt -passes='sroa' -S -o - %s | FileCheck %s
target datalayout = "e-m:o-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7-apple-unknown-macho"
diff --git a/llvm/test/DebugInfo/Generic/sroa-larger.ll b/llvm/test/DebugInfo/Generic/sroa-larger.ll
index 473f45cd3bbe0..cde57a621ddcb 100644
--- a/llvm/test/DebugInfo/Generic/sroa-larger.ll
+++ b/llvm/test/DebugInfo/Generic/sroa-larger.ll
@@ -1,4 +1,4 @@
-; RUN: opt -sroa -S -o - %s | FileCheck %s
+; RUN: opt -passes='sroa' -S -o - %s | FileCheck %s
; Generated from clang -c -O2 -g -target x86_64-pc-windows-msvc
; struct A {
; int _Myval2;
diff --git a/llvm/test/DebugInfo/Generic/sroa-samesize.ll b/llvm/test/DebugInfo/Generic/sroa-samesize.ll
index 928b0c139effa..4475eee561b5c 100644
--- a/llvm/test/DebugInfo/Generic/sroa-samesize.ll
+++ b/llvm/test/DebugInfo/Generic/sroa-samesize.ll
@@ -1,4 +1,4 @@
-; RUN: opt -sroa -S -o - %s | FileCheck %s
+; RUN: opt -passes='sroa' -S -o - %s | FileCheck %s
; Generated from clang -c -O2 -g -target x86_64-pc-windows-msvc
; struct A { double x1[]; };
; struct x2 {
diff --git a/llvm/test/DebugInfo/X86/sroa-after-inlining.ll b/llvm/test/DebugInfo/X86/sroa-after-inlining.ll
index 5613db3e93500..50cc0f351f90a 100644
--- a/llvm/test/DebugInfo/X86/sroa-after-inlining.ll
+++ b/llvm/test/DebugInfo/X86/sroa-after-inlining.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -sroa -instcombine -inline -instcombine -sroa -verify -S -o - | FileCheck %s
+; RUN: opt %s -passes='cgscc(function(sroa,instcombine),inline),function(instcombine,sroa),verify' -S -o - | FileCheck %s
;
; This test checks that SROA pass processes debug info correctly if applied twice.
; Specifically, after SROA works first time, instcombine converts dbg.declare
diff --git a/llvm/test/DebugInfo/X86/sroasplit-1.ll b/llvm/test/DebugInfo/X86/sroasplit-1.ll
index 0ec368130da28..6c3333db8b750 100644
--- a/llvm/test/DebugInfo/X86/sroasplit-1.ll
+++ b/llvm/test/DebugInfo/X86/sroasplit-1.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
+; RUN: opt %s -passes='sroa,verify' -S -o - | FileCheck %s
;
; Test that we can partial emit debug info for aggregates repeatedly
; split up by SROA.
diff --git a/llvm/test/DebugInfo/X86/sroasplit-2.ll b/llvm/test/DebugInfo/X86/sroasplit-2.ll
index 19df351cae75a..8d70c88c96d3d 100644
--- a/llvm/test/DebugInfo/X86/sroasplit-2.ll
+++ b/llvm/test/DebugInfo/X86/sroasplit-2.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
+; RUN: opt %s -passes='sroa,verify' -S -o - | FileCheck %s
;
; Test that we can partial emit debug info for aggregates repeatedly
; split up by SROA.
diff --git a/llvm/test/DebugInfo/X86/sroasplit-3.ll b/llvm/test/DebugInfo/X86/sroasplit-3.ll
index 5ffa0a873221c..271bdc438872a 100644
--- a/llvm/test/DebugInfo/X86/sroasplit-3.ll
+++ b/llvm/test/DebugInfo/X86/sroasplit-3.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
+; RUN: opt %s -passes='sroa,verify' -S -o - | FileCheck %s
; ModuleID = 'test.c'
; Test that SROA updates the debug info correctly if an alloca was rewritten but
; not partitioned into multiple allocas.
@@ -8,7 +8,7 @@
;
; struct S { float f; };
-;
+;
; float foo(struct S s) {
; return s.f;
; }
diff --git a/llvm/test/DebugInfo/X86/sroasplit-4.ll b/llvm/test/DebugInfo/X86/sroasplit-4.ll
index 0d5594ef867dd..59249cb74fcf4 100644
--- a/llvm/test/DebugInfo/X86/sroasplit-4.ll
+++ b/llvm/test/DebugInfo/X86/sroasplit-4.ll
@@ -1,4 +1,4 @@
-; RUN: opt -sroa < %s -S -o - | FileCheck %s
+; RUN: opt -passes='sroa' < %s -S -o - | FileCheck %s
;
; Test that recursively splitting an alloca updates the debug info correctly.
; CHECK: %[[T:.*]] = load i64, i64* @t, align 8
@@ -7,22 +7,22 @@
; CHECK: call void @llvm.dbg.value(metadata i64 %[[T1]], metadata ![[Y]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64))
; CHECK: call void @llvm.dbg.value(metadata i64 %[[T]], metadata ![[R:.*]], metadata !DIExpression(DW_OP_LLVM_fragment, 192, 64))
; CHECK: call void @llvm.dbg.value(metadata i64 %[[T1]], metadata ![[R]], metadata !DIExpression(DW_OP_LLVM_fragment, 256, 64))
-;
+;
; struct p {
; __SIZE_TYPE__ s;
; __SIZE_TYPE__ t;
; };
-;
+;
; struct r {
; int i;
; struct p x;
; struct p y;
; };
-;
+;
; extern int call_me(struct r);
; extern int maybe();
; extern __SIZE_TYPE__ t;
-;
+;
; int test() {
; if (maybe())
; return 0;
diff --git a/llvm/test/DebugInfo/X86/sroasplit-5.ll b/llvm/test/DebugInfo/X86/sroasplit-5.ll
index 92310c78350fc..04c5bf3ba4a9c 100644
--- a/llvm/test/DebugInfo/X86/sroasplit-5.ll
+++ b/llvm/test/DebugInfo/X86/sroasplit-5.ll
@@ -1,11 +1,11 @@
-; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
+; RUN: opt %s -passes='sroa,verify' -S -o - | FileCheck %s
; From:
; struct prog_src_register {
-; unsigned : 4;
-; int Index : 12 + 1;
-; unsigned : 12;
-; unsigned : 4;
-; int : 12 + 1
+; unsigned : 4;
+; int Index : 12 + 1;
+; unsigned : 12;
+; unsigned : 4;
+; int : 12 + 1
; } src_reg_for_float() {
; struct prog_src_register a;
; memset(&a, 0, sizeof(a));
diff --git a/llvm/test/DebugInfo/X86/sroasplit-dbg-declare.ll b/llvm/test/DebugInfo/X86/sroasplit-dbg-declare.ll
index 5ea105caf1b61..3225f886a05bc 100644
--- a/llvm/test/DebugInfo/X86/sroasplit-dbg-declare.ll
+++ b/llvm/test/DebugInfo/X86/sroasplit-dbg-declare.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -sroa -o - %s | FileCheck %s
+; RUN: opt -S -passes='sroa' -o - %s | FileCheck %s
; SROA should split the alloca in two new ones, each with its own dbg.declare.
; The original alloca and dbg.declare should be removed.
diff --git a/llvm/test/DebugInfo/debugify-each.ll b/llvm/test/DebugInfo/debugify-each.ll
index 0fff59c228cd3..e9241dedb6960 100644
--- a/llvm/test/DebugInfo/debugify-each.ll
+++ b/llvm/test/DebugInfo/debugify-each.ll
@@ -9,7 +9,7 @@
; RUN: FileCheck %s -input-file=%t -check-prefix=MODULE-PASS
; RUN: FileCheck %s -input-file=%t -check-prefix=FUNCTION-PASS
-; RUN: opt -debugify-each -passes=instrprof,instrprof,sroa,sccp -S -o /dev/null < %s 2> %t
+; RUN: opt -debugify-each -passes='instrprof,instrprof,sroa,sccp' -S -o /dev/null < %s 2> %t
; RUN: FileCheck %s -input-file=%t -check-prefix=MODULE-PASS
; RUN: FileCheck %s -input-file=%t -check-prefix=FUNCTION-PASS
diff --git a/llvm/test/DebugInfo/salvage-overflow.ll b/llvm/test/DebugInfo/salvage-overflow.ll
index d0333dcd4eccb..eff7514f82f60 100644
--- a/llvm/test/DebugInfo/salvage-overflow.ll
+++ b/llvm/test/DebugInfo/salvage-overflow.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -passes=sroa,early-cse -S | FileCheck %s
+; RUN: opt %s -passes='sroa,early-cse' -S | FileCheck %s
; CHECK: DIExpression(DW_OP_constu, 9223372036854775808, DW_OP_minus, DW_OP_stack_value)
; Created from the following C input (and then delta-reduced the IR):
;
diff --git a/llvm/test/Transforms/ADCE/2016-09-06.ll b/llvm/test/Transforms/ADCE/2016-09-06.ll
index fde6ec3096aea..850f4126e0bd4 100644
--- a/llvm/test/Transforms/ADCE/2016-09-06.ll
+++ b/llvm/test/Transforms/ADCE/2016-09-06.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -sroa -adce -adce-remove-loops -S | FileCheck %s
+; RUN: opt < %s -passes='sroa,adce' -adce-remove-loops -S | FileCheck %s
; ModuleID = 'test1.bc'
source_filename = "test1.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@@ -19,7 +19,7 @@ define i32 @foo(i32, i32, i32) #0 {
%I10 = icmp ne i32 %9, 0
br i1 %I10, label %B11, label %B21
-B11:
+B11:
store i32 0, ptr %8, align 4
br label %B12
@@ -30,10 +30,10 @@ B12:
; CHECK: br label %B20
br i1 %I15, label %B16, label %B20
-B16:
+B16:
br label %B17
-B17:
+B17:
%I18 = load i32, ptr %8, align 4
%I19 = add nsw i32 %I18, 1
store i32 %I19, ptr %8, align 4
@@ -43,7 +43,7 @@ B20:
store i32 1, ptr %7, align 4
br label %B21
-B21:
+B21:
%I22 = load i32, ptr %7, align 4
ret i32 %I22
}
diff --git a/llvm/test/Transforms/AddDiscriminators/memcpy-discriminator.ll b/llvm/test/Transforms/AddDiscriminators/memcpy-discriminator.ll
index ff3adeaeffd77..5551146eb9bf6 100644
--- a/llvm/test/Transforms/AddDiscriminators/memcpy-discriminator.ll
+++ b/llvm/test/Transforms/AddDiscriminators/memcpy-discriminator.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -passes=add-discriminators,sroa -S | FileCheck %s
+; RUN: opt < %s -passes='add-discriminators,sroa' -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/Transforms/Inline/basictest.ll b/llvm/test/Transforms/Inline/basictest.ll
index f34ed08411326..ebe7162887e1d 100644
--- a/llvm/test/Transforms/Inline/basictest.ll
+++ b/llvm/test/Transforms/Inline/basictest.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -inline -sroa -S | FileCheck %s
+; RUN: opt < %s -passes='inline,sroa' -S | FileCheck %s
; RUN: opt < %s -passes='cgscc(inline,function(sroa))' -S | FileCheck %s
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
@@ -24,24 +24,24 @@ define i32 @test1(i32 %W) {
; CHECK-NOT: @test2f(
define internal %T* @test2f(i1 %cond, %T* %P) {
br i1 %cond, label %T, label %F
-
+
T:
%A = getelementptr %T, %T* %P, i32 0, i32 0
store i32 42, i32* %A
ret %T* %P
-
+
F:
ret %T* %P
}
define i32 @test2(i1 %cond) {
%A = alloca %T
-
+
%B = call %T* @test2f(i1 %cond, %T* %A)
%C = getelementptr %T, %T* %B, i32 0, i32 0
%D = load i32, i32* %C
ret i32 %D
-
+
; CHECK-LABEL: @test2(
; CHECK-NOT: = alloca
; CHECK: ret i32
diff --git a/llvm/test/Transforms/Inline/crash2.ll b/llvm/test/Transforms/Inline/crash2.ll
index b3ca00308a4e1..7c4eda91b1922 100644
--- a/llvm/test/Transforms/Inline/crash2.ll
+++ b/llvm/test/Transforms/Inline/crash2.ll
@@ -1,4 +1,4 @@
-; RUN: opt -inline -sroa -max-devirt-iterations=1 -disable-output < %s
+; RUN: opt -passes='inline,sroa' -max-devirt-iterations=1 -disable-output < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.3"
diff --git a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
index f4e4a2c80fa65..440fe961e7501 100644
--- a/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
+++ b/llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck --check-prefix=IC %s
-; RUN: opt < %s -passes=instcombine,sroa -S | FileCheck --check-prefix=IC_SROA %s
+; RUN: opt < %s -passes='instcombine,sroa' -S | FileCheck --check-prefix=IC_SROA %s
; rdar://6417724
; Instcombine shouldn't do anything to this function that prevents promoting the allocas inside it.
diff --git a/llvm/test/Transforms/LICM/volatile-alias.ll b/llvm/test/Transforms/LICM/volatile-alias.ll
index 28a2b48e32461..2c9123edeee12 100644
--- a/llvm/test/Transforms/LICM/volatile-alias.ll
+++ b/llvm/test/Transforms/LICM/volatile-alias.ll
@@ -1,5 +1,5 @@
-; RUN: opt -sroa -loop-rotate %s | opt -aa-pipeline=basic-aa -passes='require<aa>,require<targetir>,require<scalar-evolution>,require<opt-remark-emit>,loop-mssa(licm)' -S | FileCheck %s
-; RUN: opt -sroa -loop-rotate -licm -verify-memoryssa -S < %s | FileCheck %s
+; RUN: opt -passes='sroa,loop(loop-rotate)' %s | opt -aa-pipeline=basic-aa -passes='require<aa>,require<targetir>,require<scalar-evolution>,require<opt-remark-emit>,loop-mssa(licm)' -S | FileCheck %s
+; RUN: opt -passes='sroa,loop(loop-rotate),loop-mssa(licm)' -verify-memoryssa -S < %s | FileCheck %s
; The objects *p and *q are aliased to each other, but even though *q is
; volatile, *p can be considered invariant in the loop. Check if it is moved
; out of the loop.
diff --git a/llvm/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll b/llvm/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
index df7034baf6614..e48a3ee1f80de 100644
--- a/llvm/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
+++ b/llvm/test/Transforms/LoopSimplify/2004-04-13-LoopSimplifyUpdateDomFrontier.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -sroa -loop-simplify -licm -disable-output -verify-dom-info -verify-loop-info
+; RUN: opt < %s -passes='sroa,loop(loop-simplifycfg),loop-mssa(licm)' -disable-output -verify-dom-info -verify-loop-info
define void @inflate() {
entry:
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/2011-09-26-EHCrash.ll b/llvm/test/Transforms/SimpleLoopUnswitch/2011-09-26-EHCrash.ll
index 7133b2618792d..108db7f547c2b 100644
--- a/llvm/test/Transforms/SimpleLoopUnswitch/2011-09-26-EHCrash.ll
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/2011-09-26-EHCrash.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -sroa -simple-loop-unswitch -verify-memoryssa -disable-output
+; RUN: opt < %s -passes='sroa,simple-loop-unswitch' -verify-memoryssa -disable-output
; PR11016
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.2"
diff --git a/llvm/test/Transforms/Util/dbg-user-of-aext.ll b/llvm/test/Transforms/Util/dbg-user-of-aext.ll
index ad418e12e0126..c91b68a68e899 100644
--- a/llvm/test/Transforms/Util/dbg-user-of-aext.ll
+++ b/llvm/test/Transforms/Util/dbg-user-of-aext.ll
@@ -1,7 +1,7 @@
; Checks that llvm.dbg.declare -> llvm.dbg.value conversion utility
; (here exposed through the SROA) pass refers to [s|z]exts of values (as
; opposed to the operand of a [s|z]ext).
-; RUN: opt -S -passes=sroa %s | FileCheck %s
+; RUN: opt -S -passes='sroa' %s | FileCheck %s
; Built from:
; struct foo { bool b; long i; };
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