[llvm] f4eb87f - [NVPTX] Convert tests to check 'target=nvptx.*'
Paul Robinson via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 1 09:01:59 PST 2022
Author: Paul Robinson
Date: 2022-12-01T09:01:48-08:00
New Revision: f4eb87f403367e0c96ad2836027f389b5681914d
URL: https://github.com/llvm/llvm-project/commit/f4eb87f403367e0c96ad2836027f389b5681914d
DIFF: https://github.com/llvm/llvm-project/commit/f4eb87f403367e0c96ad2836027f389b5681914d.diff
LOG: [NVPTX] Convert tests to check 'target=nvptx.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Added:
Modified:
llvm/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
llvm/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll
llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
llvm/test/CodeGen/Generic/2010-ZeroSizedArg.ll
llvm/test/CodeGen/Generic/APIntLoadStore.ll
llvm/test/CodeGen/Generic/APIntParam.ll
llvm/test/CodeGen/Generic/APIntSextParam.ll
llvm/test/CodeGen/Generic/APIntZextParam.ll
llvm/test/CodeGen/Generic/ForceStackAlign.ll
llvm/test/CodeGen/Generic/add-with-overflow-128.ll
llvm/test/CodeGen/Generic/addr-label.ll
llvm/test/CodeGen/Generic/empty-load-store.ll
llvm/test/CodeGen/Generic/externally_available.ll
llvm/test/CodeGen/Generic/fpowi-promote.ll
llvm/test/CodeGen/Generic/icmp-illegal.ll
llvm/test/CodeGen/Generic/intrinsics.ll
llvm/test/CodeGen/Generic/live-debug-label.ll
llvm/test/CodeGen/Generic/llc-start-stop.ll
llvm/test/CodeGen/Generic/pr12507.ll
llvm/test/CodeGen/Generic/pr24662.ll
llvm/test/CodeGen/Generic/stacksave-restore.ll
llvm/test/CodeGen/Generic/zero-sized-array.ll
llvm/test/CodeGen/MLRegalloc/default-eviction-advisor.ll
llvm/test/CodeGen/MLRegalloc/default-priority-advisor.ll
llvm/test/Feature/optnone-llc.ll
llvm/test/MC/AsmParser/include.ll
llvm/test/MC/AsmParser/macro-same-context.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll b/llvm/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
index ad5c588ef34a4..d47541e600889 100644
--- a/llvm/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
+++ b/llvm/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
@@ -1,7 +1,7 @@
; RUN: llc -no-integrated-as < %s
; The test uses inline assembly with x86-specific constraints.
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
define fastcc void @bc__support__high_resolution_time__initialize_clock_rate() personality i32 (...)* @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll b/llvm/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll
index 551222be3402e..4c4feda898127 100644
--- a/llvm/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll
+++ b/llvm/test/CodeGen/Generic/2009-03-17-LSR-APInt.ll
@@ -2,7 +2,7 @@
; PR3806
; NVPTX does not support 'alias' yet
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
%struct.Alignment = type { i32 }
diff --git a/llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll b/llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
index 596a0de5b555d..9b7d0c1cf70e4 100644
--- a/llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
+++ b/llvm/test/CodeGen/Generic/2010-11-04-BigByval.ll
@@ -4,7 +4,7 @@
; The test is intentionally disabled only for the NVPTX target
; (i.e. not for nvptx-registered-target feature) due to excessive runtime.
; Please note, that there are NVPTX special testcases for "byval"
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
%big = type [131072 x i8]
diff --git a/llvm/test/CodeGen/Generic/2010-ZeroSizedArg.ll b/llvm/test/CodeGen/Generic/2010-ZeroSizedArg.ll
index 2b414db56bdb9..ca7a709cb6ec8 100644
--- a/llvm/test/CodeGen/Generic/2010-ZeroSizedArg.ll
+++ b/llvm/test/CodeGen/Generic/2010-ZeroSizedArg.ll
@@ -2,7 +2,7 @@
; PR4975
; NVPTX does not support zero sized type arg
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
%0 = type <{ [0 x i32] }>
%union.T0 = type { }
diff --git a/llvm/test/CodeGen/Generic/APIntLoadStore.ll b/llvm/test/CodeGen/Generic/APIntLoadStore.ll
index 164952aa27fa2..ec282ca48981a 100644
--- a/llvm/test/CodeGen/Generic/APIntLoadStore.ll
+++ b/llvm/test/CodeGen/Generic/APIntLoadStore.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s > %t
; NVPTX does not support arbitrary integer types and has acceptable subset tested in NVPTX/APIntLoadStore.ll
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
@i1_l = external global i1 ; <i1*> [#uses=1]
@i1_s = external global i1 ; <i1*> [#uses=1]
diff --git a/llvm/test/CodeGen/Generic/APIntParam.ll b/llvm/test/CodeGen/Generic/APIntParam.ll
index 45a83642ee17e..5880a036c7f35 100644
--- a/llvm/test/CodeGen/Generic/APIntParam.ll
+++ b/llvm/test/CodeGen/Generic/APIntParam.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s > %t
; NVPTX does not support arbitrary integer types and has acceptable subset tested in NVPTX/APIntParam.ll
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
@i1_s = external global i1 ; <i1*> [#uses=1]
@i2_s = external global i2 ; <i2*> [#uses=1]
diff --git a/llvm/test/CodeGen/Generic/APIntSextParam.ll b/llvm/test/CodeGen/Generic/APIntSextParam.ll
index 6d8717ec69314..e563c8842b2b4 100644
--- a/llvm/test/CodeGen/Generic/APIntSextParam.ll
+++ b/llvm/test/CodeGen/Generic/APIntSextParam.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s > %t
; NVPTX does not support arbitrary integer types and has acceptable subset tested in NVPTX/APIntSextParam.ll
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
@i1_s = external global i1 ; <i1*> [#uses=1]
@i2_s = external global i2 ; <i2*> [#uses=1]
diff --git a/llvm/test/CodeGen/Generic/APIntZextParam.ll b/llvm/test/CodeGen/Generic/APIntZextParam.ll
index 664b6c15b2f79..b0edb7a3323ba 100644
--- a/llvm/test/CodeGen/Generic/APIntZextParam.ll
+++ b/llvm/test/CodeGen/Generic/APIntZextParam.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s > %t
; NVPTX does not support arbitrary integer types and has acceptable subset tested in NVPTX/APIntZextParam.ll
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
@i1_s = external global i1 ; <i1*> [#uses=1]
@i2_s = external global i2 ; <i2*> [#uses=1]
diff --git a/llvm/test/CodeGen/Generic/ForceStackAlign.ll b/llvm/test/CodeGen/Generic/ForceStackAlign.ll
index e3b7247e017fc..9b07ea642525f 100644
--- a/llvm/test/CodeGen/Generic/ForceStackAlign.ll
+++ b/llvm/test/CodeGen/Generic/ForceStackAlign.ll
@@ -9,7 +9,7 @@
; XFAIL: sparc
; NVPTX cannot select dynamic_stackalloc
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
define i32 @f(i8* %p) nounwind {
entry:
diff --git a/llvm/test/CodeGen/Generic/add-with-overflow-128.ll b/llvm/test/CodeGen/Generic/add-with-overflow-128.ll
index 2a45dd4c170d7..e989d3266ad54 100644
--- a/llvm/test/CodeGen/Generic/add-with-overflow-128.ll
+++ b/llvm/test/CodeGen/Generic/add-with-overflow-128.ll
@@ -2,7 +2,7 @@
; NVPTX fails to LowerFormalArguments for arg type i96
; the arg byte size must be one of the {16, 8, 4, 2}
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
diff --git a/llvm/test/CodeGen/Generic/addr-label.ll b/llvm/test/CodeGen/Generic/addr-label.ll
index d60e3757c3a1c..45588074a8837 100644
--- a/llvm/test/CodeGen/Generic/addr-label.ll
+++ b/llvm/test/CodeGen/Generic/addr-label.ll
@@ -4,7 +4,7 @@
; REQUIRES: arm-registered-target
; NVPTX cannot select BlockAddress
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
;; Reference to a label that gets deleted.
define i8* @test1() nounwind {
diff --git a/llvm/test/CodeGen/Generic/empty-load-store.ll b/llvm/test/CodeGen/Generic/empty-load-store.ll
index b20b52c787995..02d94263bfb51 100644
--- a/llvm/test/CodeGen/Generic/empty-load-store.ll
+++ b/llvm/test/CodeGen/Generic/empty-load-store.ll
@@ -2,7 +2,7 @@
; PR2612
; Triggers a crash on assertion as NVPTX does not support 0-sized arrays.
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
@current_foo = internal global { } zeroinitializer
diff --git a/llvm/test/CodeGen/Generic/externally_available.ll b/llvm/test/CodeGen/Generic/externally_available.ll
index f9321e3047ae1..915347e7ea43e 100644
--- a/llvm/test/CodeGen/Generic/externally_available.ll
+++ b/llvm/test/CodeGen/Generic/externally_available.ll
@@ -6,7 +6,7 @@
; so that users won't run into errors in situations like:
; clang -target powerpc-ibm-aix -xc -<<<$'extern inline __attribute__((__gnu_inline__)) void foo() {}\nvoid bar() { foo(); }' -O -Xclang -disable-llvm-passes
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
; unexpected emitting of the global var, while the function is not emitted as expected
; test_function should not be emitted to the .s file.
diff --git a/llvm/test/CodeGen/Generic/fpowi-promote.ll b/llvm/test/CodeGen/Generic/fpowi-promote.ll
index 3f9434b6e5d6e..cb7dfc7036ba5 100644
--- a/llvm/test/CodeGen/Generic/fpowi-promote.ll
+++ b/llvm/test/CodeGen/Generic/fpowi-promote.ll
@@ -3,7 +3,7 @@
; PR1239
; Undefined external symbol "__powisf2"
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
define float @test(float %tmp23302331, i32 %tmp23282329 ) {
diff --git a/llvm/test/CodeGen/Generic/icmp-illegal.ll b/llvm/test/CodeGen/Generic/icmp-illegal.ll
index be5b46639d24b..1af42e3443d21 100644
--- a/llvm/test/CodeGen/Generic/icmp-illegal.ll
+++ b/llvm/test/CodeGen/Generic/icmp-illegal.ll
@@ -2,7 +2,7 @@
; NVPTX fails to LowerFormalArguments for arg size > i128
; the arg byte size must be one of the {16, 8, 4, 2}
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
; CHECK-LABEL: test_ult
define i1 @test_ult(i256 %a) nounwind {
diff --git a/llvm/test/CodeGen/Generic/intrinsics.ll b/llvm/test/CodeGen/Generic/intrinsics.ll
index f432f202d63af..64db9b67356e7 100644
--- a/llvm/test/CodeGen/Generic/intrinsics.ll
+++ b/llvm/test/CodeGen/Generic/intrinsics.ll
@@ -2,7 +2,7 @@
; RUN: llc -O0 < %s
; NVPTX can't select sinf(float)/sin(double)
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
;; SQRT
declare float @llvm.sqrt.f32(float)
diff --git a/llvm/test/CodeGen/Generic/live-debug-label.ll b/llvm/test/CodeGen/Generic/live-debug-label.ll
index cf3b98c5e1c98..88bc438fd9660 100644
--- a/llvm/test/CodeGen/Generic/live-debug-label.ll
+++ b/llvm/test/CodeGen/Generic/live-debug-label.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -stop-after=virtregrewriter -o - | FileCheck %s
;
; NVPTX produces a
diff erent order of the BBs
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
; Generated with "clang++ -g -O1 -S -emit-llvm"
;
diff --git a/llvm/test/CodeGen/Generic/llc-start-stop.ll b/llvm/test/CodeGen/Generic/llc-start-stop.ll
index b8d5229c86ed4..db5146d4cba5c 100644
--- a/llvm/test/CodeGen/Generic/llc-start-stop.ll
+++ b/llvm/test/CodeGen/Generic/llc-start-stop.ll
@@ -1,5 +1,5 @@
; NVPTX customizes the list of passes so the test cannot find what it expects
-; XFAIL: nvptx
+; XFAIL: target=nvptx{{.*}}
; Note: -verify-machineinstrs is used in order to make this test compatible with EXPENSIVE_CHECKS.
; RUN: llc < %s -debug-pass=Structure -stop-after=loop-reduce -verify-machineinstrs -o /dev/null 2>&1 \
diff --git a/llvm/test/CodeGen/Generic/pr12507.ll b/llvm/test/CodeGen/Generic/pr12507.ll
index 865e10f6018ec..ee8bdcba9da3d 100644
--- a/llvm/test/CodeGen/Generic/pr12507.ll
+++ b/llvm/test/CodeGen/Generic/pr12507.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s
; NVPTX failed to lower arg i160, as size > 64
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
@c = external global i32, align 4
diff --git a/llvm/test/CodeGen/Generic/pr24662.ll b/llvm/test/CodeGen/Generic/pr24662.ll
index da707494a99c3..553864858a6bf 100644
--- a/llvm/test/CodeGen/Generic/pr24662.ll
+++ b/llvm/test/CodeGen/Generic/pr24662.ll
@@ -2,7 +2,7 @@
; RUN: llc < %s
; NVPTX failed to lower i670010, as size > 64
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
define i60 @PR24662a() {
ret i60 trunc (i670010 fptoui(float 0x400D9999A0000000 to i670010) to i60)
diff --git a/llvm/test/CodeGen/Generic/stacksave-restore.ll b/llvm/test/CodeGen/Generic/stacksave-restore.ll
index 52b4a4d123a78..9888393702e9f 100644
--- a/llvm/test/CodeGen/Generic/stacksave-restore.ll
+++ b/llvm/test/CodeGen/Generic/stacksave-restore.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s
; NVPTX can not select llvm.stacksave (dynamic_stackalloc) and llvm.stackrestore
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
declare i8* @llvm.stacksave()
diff --git a/llvm/test/CodeGen/Generic/zero-sized-array.ll b/llvm/test/CodeGen/Generic/zero-sized-array.ll
index 247b467923da6..05fa5686106df 100644
--- a/llvm/test/CodeGen/Generic/zero-sized-array.ll
+++ b/llvm/test/CodeGen/Generic/zero-sized-array.ll
@@ -2,7 +2,7 @@
; PR9900
; NVPTX does not support zero sized type arg
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
%zero = type [0 x i8]
%foobar = type { i32, %zero }
diff --git a/llvm/test/CodeGen/MLRegalloc/default-eviction-advisor.ll b/llvm/test/CodeGen/MLRegalloc/default-eviction-advisor.ll
index 598a6f9e7e57b..234485923f839 100644
--- a/llvm/test/CodeGen/MLRegalloc/default-eviction-advisor.ll
+++ b/llvm/test/CodeGen/MLRegalloc/default-eviction-advisor.ll
@@ -8,7 +8,7 @@
; RUN: llc -O2 -regalloc-enable-advisor=default < %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
; regalloc-enable-advisor is not enabled for NVPTX
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
define void @f2(i64 %lhs, i64 %rhs, i64* %addr) {
%sum = add i64 %lhs, %rhs
diff --git a/llvm/test/CodeGen/MLRegalloc/default-priority-advisor.ll b/llvm/test/CodeGen/MLRegalloc/default-priority-advisor.ll
index 9f5987c5d94af..839847c54c030 100644
--- a/llvm/test/CodeGen/MLRegalloc/default-priority-advisor.ll
+++ b/llvm/test/CodeGen/MLRegalloc/default-priority-advisor.ll
@@ -8,7 +8,7 @@
; RUN: llc -O2 -regalloc-enable-priority-advisor=default < %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
; regalloc-enable-priority-advisor is not enabled for NVPTX
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
define void @f2(i64 %lhs, i64 %rhs, i64* %addr) {
%sum = add i64 %lhs, %rhs
diff --git a/llvm/test/Feature/optnone-llc.ll b/llvm/test/Feature/optnone-llc.ll
index cd4a4f0d0a7ae..4f5f8554c16d8 100644
--- a/llvm/test/Feature/optnone-llc.ll
+++ b/llvm/test/Feature/optnone-llc.ll
@@ -6,7 +6,7 @@
; RUN: llc -O1 -debug-only=isel -fast-isel=false %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=NOFAST
; REQUIRES: asserts, default_triple
-; UNSUPPORTED: nvptx
+; UNSUPPORTED: target=nvptx{{.*}}
; This test verifies that we don't run Machine Function optimizations
; on optnone functions, and that we can turn off FastISel.
diff --git a/llvm/test/MC/AsmParser/include.ll b/llvm/test/MC/AsmParser/include.ll
index 4009fbaed455e..0ca1697a14f48 100644
--- a/llvm/test/MC/AsmParser/include.ll
+++ b/llvm/test/MC/AsmParser/include.ll
@@ -1,5 +1,5 @@
; RUN: llc -I %p/Inputs -filetype asm -o - %s | FileCheck %s
-; UNSUPPORTED: -zos,nvptx
+; UNSUPPORTED: -zos,target=nvptx{{.*}}
; REQUIRES: default_triple
module asm ".include \22module.x\22"
diff --git a/llvm/test/MC/AsmParser/macro-same-context.ll b/llvm/test/MC/AsmParser/macro-same-context.ll
index ddd548a813208..67e55cef3c74d 100644
--- a/llvm/test/MC/AsmParser/macro-same-context.ll
+++ b/llvm/test/MC/AsmParser/macro-same-context.ll
@@ -1,6 +1,6 @@
;; Test that macros in inline assembly blocks share the same context,
;; thus a definition is available to the whole file. PR36110
-; UNSUPPORTED: -zos,nvptx
+; UNSUPPORTED: -zos,target=nvptx{{.*}}
; RUN: not llc < %s 2>&1 | FileCheck %s
; REQUIRES: default_triple
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