[PATCH] D139111: [AArch64][SME] Avoid going through memory for streaming-compatible splats

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 1 08:14:23 PST 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11959-11966
+    if (VT.getVectorMinNumElements() > 1) {
+      if (auto Splat = cast<BuildVectorSDNode>(Op)->getSplatValue()) {
+        SDLoc DL(Op);
+        EVT ContainerVT = getContainerForFixedLengthVector(DAG, VT);
+        SDValue S = DAG.getNode(ISD::SPLAT_VECTOR, DL, ContainerVT, Splat);
+        return convertFromScalableVector(DAG, Op.getValueType(), S);
+      }
----------------
This doesn't look like the correct play to me.  We don't support `ISD::BUILD_VECTOR` for SVE vectors and this extends to the fixed length variety.

I think what's actually missing is custom lowering for `ISD::SPLAT_VECTOR` for 64/128-bit fixed length vector types, presumably with logic to not low the `NumElements == 1` case given that's best scalarised?

This might not yield exactly the same code but is a better starting point.



Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139111/new/

https://reviews.llvm.org/D139111



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