[PATCH] D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV
    Anton Sidorenko via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Thu Dec  1 05:32:11 PST 2022
    
    
  
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa21bbc24d306: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it… (authored by asi-sc).
Changed prior to commit:
  https://reviews.llvm.org/D138302?vs=476484&id=479257#toc
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138302/new/
https://reviews.llvm.org/D138302
Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
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