[llvm] 14d9934 - [RISCV] Inline RISCVFrameLowering::adjustReg out of existance [nfc]
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 30 11:07:53 PST 2022
Author: Philip Reames
Date: 2022-11-30T11:07:45-08:00
New Revision: 14d993435b147dd1cc4a30afda32ebbff9fb0b3d
URL: https://github.com/llvm/llvm-project/commit/14d993435b147dd1cc4a30afda32ebbff9fb0b3d
DIFF: https://github.com/llvm/llvm-project/commit/14d993435b147dd1cc4a30afda32ebbff9fb0b3d.diff
LOG: [RISCV] Inline RISCVFrameLowering::adjustReg out of existance [nfc]
This was requested by a reviewer in D138926.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
llvm/lib/Target/RISCV/RISCVFrameLowering.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index e5df8866ba9a..207735fe2f7b 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -289,18 +289,6 @@ uint64_t RISCVFrameLowering::getStackSizeWithRVVPadding(
return alignTo(MFI.getStackSize() + RVFI->getRVVPadding(), getStackAlign());
}
-void RISCVFrameLowering::adjustReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- const DebugLoc &DL, Register DestReg,
- Register SrcReg, int64_t Val,
- MachineInstr::MIFlag Flag) const {
- // We must keep the stack pointer aligned through any intermediate
- // updates.
- const RISCVRegisterInfo &RI = *STI.getRegisterInfo();
- RI.adjustReg(MBB, MBBI, DL, DestReg, SrcReg, StackOffset::getFixed(Val),
- Flag, getStackAlign());
-}
-
// Returns the register used to hold the frame pointer.
static Register getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; }
@@ -435,7 +423,8 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
}
// Allocate space on the stack if necessary.
- adjustReg(MBB, MBBI, DL, SPReg, SPReg, -StackSize, MachineInstr::FrameSetup);
+ RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackOffset::getFixed(-StackSize),
+ MachineInstr::FrameSetup, getStackAlign());
// Emit ".cfi_def_cfa_offset RealStackSize"
unsigned CFIIndex = MF.addFrameInst(
@@ -482,9 +471,9 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
// The frame pointer does need to be reserved from register allocation.
assert(MF.getRegInfo().isReserved(FPReg) && "FP not reserved");
- adjustReg(MBB, MBBI, DL, FPReg, SPReg,
- RealStackSize - RVFI->getVarArgsSaveSize(),
- MachineInstr::FrameSetup);
+ RI->adjustReg(MBB, MBBI, DL, FPReg, SPReg,
+ StackOffset::getFixed(RealStackSize - RVFI->getVarArgsSaveSize()),
+ MachineInstr::FrameSetup, getStackAlign());
// Emit ".cfi_def_cfa $fp, RVFI->getVarArgsSaveSize()"
unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
@@ -500,8 +489,9 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
getStackSizeWithRVVPadding(MF) - FirstSPAdjustAmount;
assert(SecondSPAdjustAmount > 0 &&
"SecondSPAdjustAmount should be greater than zero");
- adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount,
- MachineInstr::FrameSetup);
+ RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
+ StackOffset::getFixed(-SecondSPAdjustAmount),
+ MachineInstr::FrameSetup, getStackAlign());
// If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0",
// don't emit an sp-based .cfi_def_cfa_offset
@@ -616,8 +606,9 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
if (RI->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
!hasReservedCallFrame(MF)) {
assert(hasFP(MF) && "frame pointer should not have been eliminated");
- adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, -FPOffset,
- MachineInstr::FrameDestroy);
+ RI->adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg,
+ StackOffset::getFixed(-FPOffset),
+ MachineInstr::FrameDestroy, getStackAlign());
} else {
if (RVVStackSize)
adjustStackForRVV(MF, MBB, LastFrameDestroy, DL, RVVStackSize,
@@ -631,15 +622,17 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
assert(SecondSPAdjustAmount > 0 &&
"SecondSPAdjustAmount should be greater than zero");
- adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount,
- MachineInstr::FrameDestroy);
+ RI->adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg,
+ StackOffset::getFixed(SecondSPAdjustAmount),
+ MachineInstr::FrameDestroy, getStackAlign());
}
if (FirstSPAdjustAmount)
StackSize = FirstSPAdjustAmount;
// Deallocate stack
- adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackSize, MachineInstr::FrameDestroy);
+ RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, StackOffset::getFixed(StackSize),
+ MachineInstr::FrameDestroy, getStackAlign());
// Emit epilogue for shadow call stack.
emitSCSEpilogue(MF, MBB, MBBI, DL);
@@ -1117,7 +1110,9 @@ MachineBasicBlock::iterator RISCVFrameLowering::eliminateCallFramePseudoInstr(
if (MI->getOpcode() == RISCV::ADJCALLSTACKDOWN)
Amount = -Amount;
- adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
+ const RISCVRegisterInfo &RI = *STI.getRegisterInfo();
+ RI.adjustReg(MBB, MI, DL, SPReg, SPReg, StackOffset::getFixed(Amount),
+ MachineInstr::NoFlags, getStackAlign());
}
}
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.h b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
index 8b13eb0acd11..a6d98d1d1cc3 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
@@ -78,9 +78,6 @@ class RISCVFrameLowering : public TargetFrameLowering {
private:
void determineFrameLayout(MachineFunction &MF) const;
- void adjustReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
- const DebugLoc &DL, Register DestReg, Register SrcReg,
- int64_t Val, MachineInstr::MIFlag Flag) const;
void adjustStackForRVV(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
int64_t Amount, MachineInstr::MIFlag Flag) const;
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