[llvm] c478613 - InstCombine: Add baseline tests for folding or of is.fpclass
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 30 06:15:46 PST 2022
Author: Matt Arsenault
Date: 2022-11-30T09:14:12-05:00
New Revision: c4786139ac70590a3dc15e38c8d1d7c359e122db
URL: https://github.com/llvm/llvm-project/commit/c4786139ac70590a3dc15e38c8d1d7c359e122db
DIFF: https://github.com/llvm/llvm-project/commit/c4786139ac70590a3dc15e38c8d1d7c359e122db.diff
LOG: InstCombine: Add baseline tests for folding or of is.fpclass
Added:
Modified:
llvm/test/Transforms/InstCombine/is_fpclass.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll
index af51a4b0482d..496a783d302b 100644
--- a/llvm/test/Transforms/InstCombine/is_fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll
@@ -473,6 +473,166 @@ define <2 x i1> @test_class_xor_vector(<2 x float> %x) {
ret <2 x i1> %not
}
+; --------------------------------------------------------------------
+; or llvm.is.fpclass, llvm.is.fpclass
+; --------------------------------------------------------------------
+
+define i1 @test_fold_or_class_f32_0(float %a) {
+; CHECK-LABEL: @test_fold_or_class_f32_0(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1)
+; CHECK-NEXT: [[CLASS1:%.*]] = fcmp uno float [[A]], 0.000000e+00
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1)
+ %class1 = fcmp uno float %a, 0.000000e+00
+ %or = or i1 %class0, %class1
+ ret i1 %or
+}
+
+define i1 @test_fold_or3_class_f32_0(float %a) {
+; CHECK-LABEL: @test_fold_or3_class_f32_0(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1)
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 2)
+; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 4)
+; CHECK-NEXT: [[OR_0:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: [[OR_1:%.*]] = or i1 [[OR_0]], [[CLASS2]]
+; CHECK-NEXT: ret i1 [[OR_1]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1)
+ %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2)
+ %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
+ %or.0 = or i1 %class0, %class1
+ %or.1 = or i1 %or.0, %class2
+ ret i1 %or.1
+}
+
+define i1 @test_fold_or_all_tests_class_f32_0(float %a) {
+; CHECK-LABEL: @test_fold_or_all_tests_class_f32_0(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1)
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 2)
+; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 4)
+; CHECK-NEXT: [[CLASS3:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
+; CHECK-NEXT: [[CLASS4:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 16)
+; CHECK-NEXT: [[CLASS5:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 32)
+; CHECK-NEXT: [[CLASS6:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 64)
+; CHECK-NEXT: [[CLASS7:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 128)
+; CHECK-NEXT: [[CLASS8:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 256)
+; CHECK-NEXT: [[CLASS9:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 512)
+; CHECK-NEXT: [[OR_0:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: [[OR_1:%.*]] = or i1 [[OR_0]], [[CLASS2]]
+; CHECK-NEXT: [[OR_2:%.*]] = or i1 [[OR_1]], [[CLASS3]]
+; CHECK-NEXT: [[OR_3:%.*]] = or i1 [[OR_2]], [[CLASS4]]
+; CHECK-NEXT: [[OR_4:%.*]] = or i1 [[OR_3]], [[CLASS5]]
+; CHECK-NEXT: [[OR_5:%.*]] = or i1 [[OR_4]], [[CLASS6]]
+; CHECK-NEXT: [[OR_6:%.*]] = or i1 [[OR_5]], [[CLASS7]]
+; CHECK-NEXT: [[OR_7:%.*]] = or i1 [[OR_6]], [[CLASS8]]
+; CHECK-NEXT: [[OR_8:%.*]] = or i1 [[OR_7]], [[CLASS9]]
+; CHECK-NEXT: ret i1 [[OR_8]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1)
+ %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2)
+ %class2 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
+ %class3 = call i1 @llvm.is.fpclass.f32(float %a, i32 8)
+ %class4 = call i1 @llvm.is.fpclass.f32(float %a, i32 16)
+ %class5 = call i1 @llvm.is.fpclass.f32(float %a, i32 32)
+ %class6 = call i1 @llvm.is.fpclass.f32(float %a, i32 64)
+ %class7 = call i1 @llvm.is.fpclass.f32(float %a, i32 128)
+ %class8 = call i1 @llvm.is.fpclass.f32(float %a, i32 256)
+ %class9 = call i1 @llvm.is.fpclass.f32(float %a, i32 512)
+ %or.0 = or i1 %class0, %class1
+ %or.1 = or i1 %or.0, %class2
+ %or.2 = or i1 %or.1, %class3
+ %or.3 = or i1 %or.2, %class4
+ %or.4 = or i1 %or.3, %class5
+ %or.5 = or i1 %or.4, %class6
+ %or.6 = or i1 %or.5, %class7
+ %or.7 = or i1 %or.6, %class8
+ %or.8 = or i1 %or.7, %class9
+ ret i1 %or.8
+}
+
+define i1 @test_fold_or_class_f32_1(float %a) {
+; CHECK-LABEL: @test_fold_or_class_f32_1(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
+ %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8)
+ %or = or i1 %class0, %class1
+ ret i1 %or
+}
+
+define i1 @test_no_fold_or_class_f32_multi_use0(float %a, ptr %ptr) {
+; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use0(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
+; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
+ store i1 %class0, ptr %ptr
+ %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8)
+ %or = or i1 %class0, %class1
+ ret i1 %or
+}
+
+define i1 @test_no_fold_or_class_f32_multi_use1(float %a, ptr %ptr) {
+; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use1(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
+; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
+ %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8)
+ store i1 %class1, ptr %ptr
+ %or = or i1 %class0, %class1
+ ret i1 %or
+}
+
+define i1 @test_fold_or_class_f32_2(float %a) {
+; CHECK-LABEL: @test_fold_or_class_f32_2(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 7)
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
+ %class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
+ %or = or i1 %class0, %class1
+ ret i1 %or
+}
+
+define i1 @test_no_fold_or_class_f32_0(float %a, float %b) {
+; CHECK-LABEL: @test_no_fold_or_class_f32_0(
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 8)
+; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret i1 [[OR]]
+;
+ %class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
+ %class1 = call i1 @llvm.is.fpclass.f32(float %b, i32 8)
+ %or = or i1 %class0, %class1
+ ret i1 %or
+}
+
+define <2 x i1> @test_fold_or_class_v2f32(<2 x float> %a) {
+; CHECK-LABEL: @test_fold_or_class_v2f32(
+; CHECK-NEXT: [[CLASS0:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 4)
+; CHECK-NEXT: [[CLASS1:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A]], i32 8)
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CLASS0]], [[CLASS1]]
+; CHECK-NEXT: ret <2 x i1> [[OR]]
+;
+ %class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 4)
+ %class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 8)
+ %or = or <2 x i1> %class0, %class1
+ ret <2 x i1> %or
+}
declare i1 @llvm.is.fpclass.f32(float, i32 immarg)
declare i1 @llvm.is.fpclass.f64(double, i32 immarg)
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