[PATCH] D138791: [AArch64][SME]: Generate streaming-compatible code for ld2-alloca.
hassnaaHamdi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 30 06:13:15 PST 2022
hassnaa-arm added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13970
+ if (Subtarget->forceStreamingCompatibleSVE() ||
+ (Subtarget->useSVEForFixedLengthVectors() &&
+ (VecSize % Subtarget->getMinSVEVectorSizeInBits() == 0 ||
----------------
sdesmalen wrote:
> Sorry, I just realise you'll also need to add a check that we can generate a predicate pattern for the number of elements (e.g. vl2, vl3, ...), because e.g. a <9 x i8> has no corresponding predicate pattern. You can use `Optional<unsigned> getSVEPredPatternFromNumElements()` for this (defined in Utils/AArch64BaseInfo.h).
>
> Can you also add a test for <9 x i8> ?
Sorry, I don't understand why I should check for e.g. a <9 x i8> ? How is that related to the condition in the code ?
and what do you mean by "You can use Optional<unsigned> getSVEPredPatternFromNumElements() for this " ?
Do you mean that in addition to adding the check, I will add a code change also ?
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https://reviews.llvm.org/D138791/new/
https://reviews.llvm.org/D138791
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