[PATCH] D139002: [AMDGPU] Remove todo about vector types

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 30 04:20:27 PST 2022


sebastian-ne created this revision.
sebastian-ne added reviewers: matejam, dstuttard, foad.
Herald added subscribers: kosarev, kerbowa, hiraditya, tpr, yaxunl, jvesely, kzhuravl, arsenm.
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sebastian-ne requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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D138205 <https://reviews.llvm.org/D138205> added all the new vector types, so the todo is fixed now.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139002

Files:
  llvm/lib/Target/AMDGPU/MIMGInstructions.td


Index: llvm/lib/Target/AMDGPU/MIMGInstructions.td
===================================================================
--- llvm/lib/Target/AMDGPU/MIMGInstructions.td
+++ llvm/lib/Target/AMDGPU/MIMGInstructions.td
@@ -1133,8 +1133,6 @@
 
 class MIMG_IntersectRay_Helper<bit Is64, bit A16> {
   int num_addrs = !if(Is64, !if(A16, 9, 12), !if(A16, 8, 11));
-  // TODO: MIMGAddrSize will choose VReg_512 which is a 16 register tuple,
-  // when we only need 9, 11 or 12 depending on A16 field and ptr size.
   RegisterClass RegClass = MIMGAddrSize<num_addrs, 0>.RegClass;
   int VAddrDwords = !srl(RegClass.Size, 5);
 


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