[PATCH] D138710: [AMDGPU][MC][GFX11] Disable non-VGPR src operands for v_fmac_f16_e64_dpp and v_fmac_f32_e64_dpp instructions

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/VOP2Instructions.td:429
                        0, HasModifiers, HasModifiers, HasOMod,
-                       Src0Mod, Src1Mod, Src2Mod>.ret;
+                       FPVRegInputMods, FPVRegInputMods, Src2Mod>.ret;
   // We need a dummy src2 tied to dst to track the use of that register for s_delay_alu
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Joe_Nash wrote:
> I think it can be the following, which is more generic.
> 
> 
> ```
> let InsVOP3Base  = getIns64<Src0VOP3DPP, Src1VOP3DPP, RegisterOperand<VGPR_32>, 3,
>                        0, HasModifiers, HasModifiers, HasOMod,
>                        Src0ModVOP3DPP, Src1ModVOP3DPP, Src2Mod>.ret;
> ```
Thanks! It works and looks more logical.


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  https://reviews.llvm.org/D138710/new/

https://reviews.llvm.org/D138710