[PATCH] D138706: [NFC][ASAN][AMDGPU] Use CreateNot/CreateIsNotNull instead of more verbose CreateICMP methods

[Juan Manuel Martinez Caamaño via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5cf6fbc5a0e1: [NFC][ASAN][AMDGPU] Use CreateNot/CreateIsNotNull instead of more verbose… (authored by jmmartinez).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138706/new/

https://reviews.llvm.org/D138706

Files:
  llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
  llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll


Index: llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
===================================================================
--- llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
+++ llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
@@ -10,7 +10,7 @@
 ; CHECK:   call i1 @llvm.amdgcn.is.shared(ptr %[[GENERIC_ADDR]])
 ; CHECK:   call i1 @llvm.amdgcn.is.private(ptr %[[GENERIC_ADDR]])
 ; CHECK:   or
-; CHECK:   icmp ne i1
+; CHECK:   xor i1 %{{.*}}, true
 ; CHECK:   br i1 %{{.*}}, label %{{.*}}, label %{{.*}}
 ;
 ; CHECK:   %[[STORE_ADDR:[^ ]*]] = ptrtoint ptr %q to i64
@@ -46,7 +46,7 @@
 ; CHECK:   call i1 @llvm.amdgcn.is.shared(ptr %[[GENERIC_ADDR]])
 ; CHECK:   call i1 @llvm.amdgcn.is.private(ptr %[[GENERIC_ADDR]])
 ; CHECK:   or
-; CHECK:   icmp ne i1
+; CHECK:   xor i1 %{{.*}}, true
 ; CHECK:   br i1 %{{.*}}, label %{{.*}}, label %{{.*}}
 ;
 ; CHECK:   %[[STORE_ADDR:[^ ]*]] = ptrtoint ptr %q to i64
Index: llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
===================================================================
--- llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
@@ -1572,7 +1572,7 @@
   Value *IsShared = IRB.CreateCall(AMDGPUAddressShared, {AddrLong});
   Value *IsPrivate = IRB.CreateCall(AMDGPUAddressPrivate, {AddrLong});
   Value *IsSharedOrPrivate = IRB.CreateOr(IsShared, IsPrivate);
-  Value *Cmp = IRB.CreateICmpNE(IRB.getTrue(), IsSharedOrPrivate);
+  Value *Cmp = IRB.CreateNot(IsSharedOrPrivate);
   Value *AddrSpaceZeroLanding =
       SplitBlockAndInsertIfThen(Cmp, InsertBefore, false);
   InsertBefore = cast<Instruction>(AddrSpaceZeroLanding);
@@ -1620,11 +1620,10 @@
       IntegerType::get(*C, std::max(8U, TypeSize >> Mapping.Scale));
   Type *ShadowPtrTy = PointerType::get(ShadowTy, 0);
   Value *ShadowPtr = memToShadow(AddrLong, IRB);
-  Value *CmpVal = Constant::getNullValue(ShadowTy);
   Value *ShadowValue =
       IRB.CreateLoad(ShadowTy, IRB.CreateIntToPtr(ShadowPtr, ShadowPtrTy));
 
-  Value *Cmp = IRB.CreateICmpNE(ShadowValue, CmpVal);
+  Value *Cmp = IRB.CreateIsNotNull(ShadowValue);
   size_t Granularity = 1ULL << Mapping.Scale;
   Instruction *CrashTerm = nullptr;
 


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