[PATCH] D131867: [AVR] Do not emit instructions invalid for attiny10

[Ben Shi via Phabricator via llvm-commits]

benshi001 added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRInstrInfo.td:1337
+  //   ld    Rd+1, P+
+  //   subiw P,    2
   let Constraints = "@earlyclobber $reg" in def LDWRdPtr
----------------
aykevl wrote:
> benshi001 wrote:
> > `subiw` is still a pseudo instruction, it would be better to give real instructions in this comment. 
> How would you suggest to do this? Something like this?
> 
> ```
>   //   ld   Rd,   P+
>   //   ld   Rd+1, P+
>   //   subi PL,    2
>   //   sbci PH,    0
> ```
> 
> I think the original is easier to read.
Indeed, I think this form is more obvious 


================
Comment at: llvm/lib/Target/AVR/AVRInstrInfo.td:1418
+  //   ld    Rd+1, P+
+  //   subiw P,    q+2
   let Constraints = "@earlyclobber $dst" in def LDDWRdPtrQ
----------------
aykevl wrote:
> benshi001 wrote:
> > `subiw` is still a pseudo instruction, it would be better to give real instructions in this comment. 
> Same here, but here it becomes even harder to write nice instructions. Closest I can think of is this:
> 
> ```
>   //   subi PL,   lo8(-q)
>   //   sbci PH,   hi8(-q)
>   //   ld   Rd,   P+
>   //   ld   Rd+1, P+
>   //   subi PL,   lo8(q)
>   //   sbci PH,   hi8(q)
> ```
That is fine.


================
Comment at: llvm/test/CodeGen/AVR/calling-conv/c/tiny.ll:49-59
 ; CHECK-NEXT:    in r29, 62
-; CHECK-NEXT:    ldd r30, Y+5
-; CHECK-NEXT:    ldd r31, Y+6
+; CHECK-NEXT:    in r16, 63
+; CHECK-NEXT:    subi r28, 251
+; CHECK-NEXT:    sbci r29, 255
+; CHECK-NEXT:    ld r30, Y+
+; CHECK-NEXT:    ld r31, Y+
+; CHECK-NEXT:    subi r28, 2
----------------
aykevl wrote:
> benshi001 wrote:
> > aykevl wrote:
> > > The code here is really terrible but it should be correct. I hope to optimize this in a later pass with a late pass that merges pointer adjustments.
> > Is such pattern common ? Is it necessary to introduce an extra pass just for this pattern? 
> > 
> > Since AVRTiny is a known low performance device serial, I think such pattern is OK. An extra pass will lead to longer run time.
> > Is such pattern common ? Is it necessary to introduce an extra pass just for this pattern?
> 
> I don't know. Maybe I'll try it, maybe not. But these chips are so small that every bit helps.
That is another issue which we can decide later. Please commit this patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131867/new/

https://reviews.llvm.org/D131867