[PATCH] D138215: [AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones.

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 28 13:16:59 PST 2022


arsenm added a comment.

LGTM, except I'd like to see tests trying to break the d16 interactions



================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll:337
+declare { i32, i32 } @llvm.amdgcn.struct.buffer.load.format.sl_i32i32s(<4 x i32>, i32, i32, i32, i32 immarg) #0
 
 attributes #0 = { nounwind readonly }
----------------
Can you also add i16 and f16 cases?


================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll:232
+declare { float, i32 } @llvm.amdgcn.struct.buffer.load.format.sl_f32i32s(<4 x i32>, i32, i32, i32, i32 immarg) #0
 
 attributes #0 = { nounwind readonly }
----------------
Ditto, i16 and f16 cases


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138215/new/

https://reviews.llvm.org/D138215



More information about the llvm-commits mailing list