[PATCH] D138791: [AArch64][SME]: Generate streaming-compatible code for ld2-alloca.
hassnaaHamdi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 28 09:24:08 PST 2022
hassnaa-arm marked an inline comment as done.
hassnaa-arm added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13969
- if (Subtarget->useSVEForFixedLengthVectors() &&
+ if (Subtarget->forceStreamingCompatibleSVE() ||
+ (Subtarget->useSVEForFixedLengthVectors() &&
----------------
sdesmalen wrote:
> This also allows the case where the total VecSize == 32 (for e.g. `<4 x i8>` which is currently not supported by Neon), or whether the number of elements is not a power of 2 (e.g. `<6 x i8>`. Can you add a test for this case?
In the IR, I don't understand why it allocates 16 elements while it only loads 8.
Is there a reason behind that ?
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https://reviews.llvm.org/D138791/new/
https://reviews.llvm.org/D138791
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