[PATCH] D138827: [ARM,MVE] Update MVE_VMLA_qr for architecture change.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham created this revision.
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In revision B.q and before of the Armv8-M architecture reference
manual, the vector/scalar forms of the `vmla` and `vmlas` instructions
came in signed and unsigned integer forms, such as `vmla.s8 q0,q1,r2`
or `vmlas.u32 q3,q4,r5`.

Revision B.r has changed this. There are no longer signed and unsigned
versions of these instructions, since they were functionally identical
anyway. Now there is just `vmla.i8` (or `i16` or `i32`, and similarly
for `vmlas`). Bit 28 of the instruction encoding, which was previously
0 for signed or 1 for unsigned, is now expected to be 0 always.

This change updates LLVM to the new version of the architecture. The
obsoleted encodings for unsigned integers are now decoding errors, and
only the still-valid encoding is ever emitted. This shouldn't break
any existing assembly code, because the old signed and unsigned
versions of the mnemonic are still accepted by the assembler (which is
standard practice anyway for all signedness-agnostic MVE integer
instructions).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138827

Files:
  llvm/lib/Target/ARM/ARMInstrMVE.td
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
  llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
  llvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
  llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll
  llvm/test/CodeGen/Thumb2/mve-qrintr.ll
  llvm/test/CodeGen/Thumb2/mve-qrintrsplat.ll
  llvm/test/CodeGen/Thumb2/mve-vmla.ll
  llvm/test/CodeGen/Thumb2/mve-vmovlloop.ll
  llvm/test/MC/ARM/mve-qdest-rsrc.s
  llvm/test/MC/Disassembler/ARM/mve-qdest-rsrc.txt
  llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
  llvm/unittests/Target/ARM/MachineInstrTest.cpp

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