[PATCH] D138811: [AArch64] SelectionDag codegen for gpr CTZ instruction

[Ties Stuij via Phabricator via llvm-commits]

stuij created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
stuij requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

When feature CSSC is available we should use instruction CTZ in SelectionDag
where applicable:

- CTTZ intrinsics are lowered to using the gpr CTZ instruction
- BITREVERSE -> CTLZ instruction pattern gets replaced by CTZ

spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/CTZ--Count-Trailing-Zeros-


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138811

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/gpr_cttz.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D138811.478221.patch
Type: text/x-patch
Size: 6652 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221128/7f935c44/attachment.bin>