[llvm] 6f3335f - HWAsan: Convert tests to opaque pointers
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 27 18:24:32 PST 2022
Author: Matt Arsenault
Date: 2022-11-27T21:24:24-05:00
New Revision: 6f3335f590ff080beffa090d7f2a783155974497
URL: https://github.com/llvm/llvm-project/commit/6f3335f590ff080beffa090d7f2a783155974497
DIFF: https://github.com/llvm/llvm-project/commit/6f3335f590ff080beffa090d7f2a783155974497.diff
LOG: HWAsan: Convert tests to opaque pointers
Fixups needed in:
X86/alloca-with-calls.ll
X86/alloca.ll
alloca-with-calls.ll
atomic.ll
basic.ll
dbg-value-tag-offset.ll
kernel-alloca.ll
prologue.ll
use-after-scope.ll
Added:
Modified:
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/atomic.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/kernel.ll
llvm/test/Instrumentation/HWAddressSanitizer/X86/with-calls.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca-uninteresting.ll
llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
llvm/test/Instrumentation/HWAddressSanitizer/atomic.ll
llvm/test/Instrumentation/HWAddressSanitizer/basic-compat.ll
llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll
llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset-nopad.ll
llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset.ll
llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
llvm/test/Instrumentation/HWAddressSanitizer/fuchsia.ll
llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
llvm/test/Instrumentation/HWAddressSanitizer/kernel-inline.ll
llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll
llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll
llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll
llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
llvm/test/Instrumentation/HWAddressSanitizer/personality.ll
llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll
llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
llvm/test/Instrumentation/HWAddressSanitizer/with-calls.ll
Removed:
################################################################################
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
index 82d675fe2b238..d7155ede54ebd 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
@@ -3,13 +3,13 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-declare void @use(i8*, i8*)
+declare void @use(ptr, ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK: alloca { [4 x i8], [12 x i8] }, align 16
%x = alloca i8, i64 4
; CHECK: alloca i8, i64 16, align 16
%y = alloca i8, i64 16
- call void @use(i8* %x, i8* %y)
+ call void @use(ptr %x, ptr %y)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
index 4a87c2de18346..aaa70c51c6f2b 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
@@ -5,19 +5,18 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-declare void @use32(i32*)
+declare void @use32(ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca(
-; CHECK: %[[BC:[^ ]*]] = bitcast { i32, [12 x i8] }* %x to i32*
; CHECK: %[[T1:[^ ]*]] = call i8 @__hwasan_generate_tag()
; CHECK: %[[A:[^ ]*]] = zext i8 %[[T1]] to i64
-; CHECK: %[[B:[^ ]*]] = ptrtoint i32* %[[BC]] to i64
+; CHECK: %[[B:[^ ]*]] = ptrtoint ptr %x to i64
; CHECK: %[[C:[^ ]*]] = shl i64 %[[A]], 57
; CHECK: or i64 %[[B]], %[[C]]
entry:
%x = alloca i32, align 4
- call void @use32(i32* nonnull %x)
+ call void @use32(ptr nonnull %x)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
index e3e9ab9a713f7..6e2d535154905 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
@@ -6,40 +6,37 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-declare void @use32(i32*)
+declare void @use32(ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca(
-; CHECK: %[[FP:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %[[FP]] to i64
+; CHECK: %[[FP:[^ ]*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %[[FP]] to i64
; CHECK: %[[B:[^ ]*]] = lshr i64 %[[A]], 20
; CHECK: %[[A_XOR_B:[^ ]*]] = xor i64 %[[A]], %[[B]]
; CHECK: %[[BASE_TAG:[^ ]*]] = and i64 %[[A_XOR_B]], 63
; CHECK: %[[X:[^ ]*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK: %[[X_BC:[^ ]*]] = bitcast { i32, [12 x i8] }* %[[X]] to i32*
; CHECK: %[[X_TAG:[^ ]*]] = xor i64 %[[BASE_TAG]], 0
-; CHECK: %[[X1:[^ ]*]] = ptrtoint i32* %[[X_BC]] to i64
+; CHECK: %[[X1:[^ ]*]] = ptrtoint ptr %[[X]] to i64
; CHECK: %[[C:[^ ]*]] = shl i64 %[[X_TAG]], 57
; CHECK: %[[D:[^ ]*]] = or i64 %[[X1]], %[[C]]
-; CHECK: %[[X_HWASAN:[^ ]*]] = inttoptr i64 %[[D]] to i32*
+; CHECK: %[[X_HWASAN:[^ ]*]] = inttoptr i64 %[[D]] to ptr
; CHECK: %[[X_TAG2:[^ ]*]] = trunc i64 %[[X_TAG]] to i8
-; CHECK: %[[X_I8:[^ ]*]] = bitcast i32* %[[X_BC]] to i8*
-; CHECK: call void @__hwasan_tag_memory(i8* %[[X_I8]], i8 %[[X_TAG2]], i64 16)
+; CHECK: call void @__hwasan_tag_memory(ptr %[[X]], i8 %[[X_TAG2]], i64 16)
-; CHECK: call void @use32(i32* nonnull %[[X_HWASAN]])
+; CHECK: call void @use32(ptr nonnull %[[X_HWASAN]])
; UAR-TAGS: %[[BASE_TAG_COMPL:[^ ]*]] = xor i64 %[[BASE_TAG]], 63
; UAR-TAGS: %[[X_TAG_UAR:[^ ]*]] = trunc i64 %[[BASE_TAG_COMPL]] to i8
-; CHECK: %[[X_I8_2:[^ ]*]] = bitcast i32* %[[X_BC]] to i8*
-; NO-UAR-TAGS: call void @__hwasan_tag_memory(i8* %[[X_I8_2]], i8 0, i64 16)
-; UAR-TAGS: call void @__hwasan_tag_memory(i8* %[[X_I8_2]], i8 %[[X_TAG_UAR]], i64 16)
+; NO-UAR-TAGS: call void @__hwasan_tag_memory(ptr %[[X]], i8 0, i64 16)
+; UAR-TAGS: call void @__hwasan_tag_memory(ptr %[[X]], i8 %[[X_TAG_UAR]], i64 16)
; CHECK: ret void
entry:
%x = alloca i32, align 4
- call void @use32(i32* nonnull %x)
+ call void @use32(ptr nonnull %x)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/atomic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/atomic.ll
index e2849d20e0da3..8949f62fbeb4d 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/atomic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/atomic.ll
@@ -5,30 +5,30 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-define void @atomicrmw(i64* %ptr) sanitize_hwaddress {
+define void @atomicrmw(ptr %ptr) sanitize_hwaddress {
; CHECK-LABEL: @atomicrmw(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %ptr to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %ptr to i64
; CHECK: call void @__hwasan_store8(i64 %[[A]])
-; CHECK: atomicrmw add i64* %ptr, i64 1 seq_cst
+; CHECK: atomicrmw add ptr %ptr, i64 1 seq_cst
; CHECK: ret void
entry:
- %0 = atomicrmw add i64* %ptr, i64 1 seq_cst
+ %0 = atomicrmw add ptr %ptr, i64 1 seq_cst
ret void
}
-define void @cmpxchg(i64* %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
+define void @cmpxchg(ptr %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
; CHECK-LABEL: @cmpxchg(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %ptr to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %ptr to i64
; CHECK: call void @__hwasan_store8(i64 %[[A]])
-; CHECK: cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
+; CHECK: cmpxchg ptr %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
; CHECK: ret void
entry:
- %0 = cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
+ %0 = cmpxchg ptr %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
index 9812a1b1b73d8..0c4b1a8f2482a 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
@@ -8,77 +8,77 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-define i8 @test_load8(i8* %a) sanitize_hwaddress {
+define i8 @test_load8(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load8(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load1(i64 %[[A]])
; RECOVER: call void @__hwasan_load1_noabort(i64 %[[A]])
-; CHECK: %[[G:[^ ]*]] = load i8, i8* %a, align 4
+; CHECK: %[[G:[^ ]*]] = load i8, ptr %a, align 4
; CHECK: ret i8 %[[G]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i40 @test_load40(i40* %a) sanitize_hwaddress {
+define i40 @test_load40(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_loadN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_loadN_noabort(i64 %[[A]], i64 5)
-; CHECK: %[[B:[^ ]*]] = load i40, i40* %a
+; CHECK: %[[B:[^ ]*]] = load i40, ptr %a
; CHECK: ret i40 %[[B]]
entry:
- %b = load i40, i40* %a, align 4
+ %b = load i40, ptr %a, align 4
ret i40 %b
}
-define void @test_store8(i8* %a, i8 %b) sanitize_hwaddress {
+define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store8(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store1(i64 %[[A]])
; RECOVER: call void @__hwasan_store1_noabort(i64 %[[A]])
-; CHECK: store i8 %b, i8* %a, align 4
+; CHECK: store i8 %b, ptr %a, align 4
; CHECK: ret void
entry:
- store i8 %b, i8* %a, align 4
+ store i8 %b, ptr %a, align 4
ret void
}
-define void @test_store40(i40* %a, i40 %b) sanitize_hwaddress {
+define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_storeN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_storeN_noabort(i64 %[[A]], i64 5)
-; CHECK: store i40 %b, i40* %a
+; CHECK: store i40 %b, ptr %a
; CHECK: ret void
entry:
- store i40 %b, i40* %a, align 4
+ store i40 %b, ptr %a, align 4
ret void
}
-define void @test_store_unaligned(i64* %a, i64 %b) sanitize_hwaddress {
+define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store_unaligned(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_storeN(i64 %[[A]], i64 8)
; RECOVER: call void @__hwasan_storeN_noabort(i64 %[[A]], i64 8)
-; CHECK: store i64 %b, i64* %a, align 4
+; CHECK: store i64 %b, ptr %a, align 4
; CHECK: ret void
entry:
- store i64 %b, i64* %a, align 4
+ store i64 %b, ptr %a, align 4
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/kernel.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/kernel.ll
index 70acd3490b9b0..603c449a2731d 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/kernel.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/kernel.ll
@@ -11,18 +11,18 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-define i8 @test_load(i8* %a) sanitize_hwaddress {
+define i8 @test_load(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load1(i64 %[[A]])
; RECOVER: call void @__hwasan_load1_noabort(i64 %[[A]])
-; CHECK: %[[G:[^ ]*]] = load i8, i8* %a, align 4
+; CHECK: %[[G:[^ ]*]] = load i8, ptr %a, align 4
; CHECK: ret i8 %[[G]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/with-calls.ll
index dd7135f3b65e7..ac092769494bc 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/with-calls.ll
@@ -6,62 +6,62 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-define i8 @test_load8(i8* %a) sanitize_hwaddress {
+define i8 @test_load8(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load8(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load1(i64 %[[A]])
; RECOVER: call void @__hwasan_load1_noabort(i64 %[[A]])
-; CHECK: %[[B:[^ ]*]] = load i8, i8* %a
+; CHECK: %[[B:[^ ]*]] = load i8, ptr %a
; CHECK: ret i8 %[[B]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i40 @test_load40(i40* %a) sanitize_hwaddress {
+define i40 @test_load40(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_loadN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_loadN_noabort(i64 %[[A]], i64 5)
-; CHECK: %[[B:[^ ]*]] = load i40, i40* %a
+; CHECK: %[[B:[^ ]*]] = load i40, ptr %a
; CHECK: ret i40 %[[B]]
entry:
- %b = load i40, i40* %a, align 4
+ %b = load i40, ptr %a, align 4
ret i40 %b
}
-define void @test_store8(i8* %a, i8 %b) sanitize_hwaddress {
+define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store8(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store1(i64 %[[A]])
; RECOVER: call void @__hwasan_store1_noabort(i64 %[[A]])
-; CHECK: store i8 %b, i8* %a
+; CHECK: store i8 %b, ptr %a
; CHECK: ret void
entry:
- store i8 %b, i8* %a, align 4
+ store i8 %b, ptr %a, align 4
ret void
}
-define void @test_store40(i40* %a, i40 %b) sanitize_hwaddress {
+define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_storeN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_storeN_noabort(i64 %[[A]], i64 5)
-; CHECK: store i40 %b, i40* %a
+; CHECK: store i40 %b, ptr %a
; CHECK: ret void
entry:
- store i40 %b, i40* %a, align 4
+ store i40 %b, ptr %a, align 4
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
index ac1cf552551ef..fe2f9e1d9ab74 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
@@ -3,13 +3,13 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-declare void @use(i8*, i8*)
+declare void @use(ptr, ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK: alloca { [4 x i8], [12 x i8] }, align 16
%x = alloca i8, i64 4
; CHECK: alloca i8, i64 16, align 16
%y = alloca i8, i64 16
- call void @use(i8* %x, i8* %y)
+ call void @use(ptr %x, ptr %y)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
index cb86d3487c0eb..c6d5d8e8be598 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
@@ -5,13 +5,13 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-declare void @use32(i32*)
+declare void @use32(ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca(
; CHECK: %[[X_TAG:[^ ]*]] = trunc i64 {{.*}} to i8
-; CHECK: call void @llvm.memset.p0i8.i64(i8* align 1 {{.*}}, i8 %[[X_TAG]], i64 1, i1 false)
+; CHECK: call void @llvm.memset.p0.i64(ptr align 1 {{.*}}, i8 %[[X_TAG]], i64 1, i1 false)
%x = alloca i32, align 4
- call void @use32(i32* nonnull %x)
+ call void @use32(ptr nonnull %x)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-uninteresting.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-uninteresting.ll
index 053ca6f8c9314..e9f3c3d8b48b9 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-uninteresting.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-uninteresting.ll
@@ -7,21 +7,21 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android10000"
-declare void @use32(i32*)
+declare void @use32(ptr)
define void @test_dyn_alloca(i32 %n) sanitize_hwaddress !dbg !15 {
; CHECK-LABEL: @test_dyn_alloca(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 [[N:%.*]], align 4
-; CHECK-NEXT: call void @llvm.dbg.value(metadata !DIArgList(i32* [[X]], i32* [[X]]), metadata [[META10:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg [[DBG12:![0-9]+]]
-; CHECK-NEXT: call void @use32(i32* nonnull [[X]]), !dbg [[DBG13:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META10:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg [[DBG12:![0-9]+]]
+; CHECK-NEXT: call void @use32(ptr nonnull [[X]]), !dbg [[DBG13:![0-9]+]]
; CHECK-NEXT: ret void, !dbg [[DBG14:![0-9]+]]
;
entry:
%x = alloca i32, i32 %n, align 4
- call void @llvm.dbg.value(metadata !DIArgList(i32* %x, i32* %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21
- call void @use32(i32* nonnull %x), !dbg !23
+ call void @llvm.dbg.value(metadata !DIArgList(ptr %x, ptr %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21
+ call void @use32(ptr nonnull %x), !dbg !23
ret void, !dbg !24
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
index 06670541866e6..8c386f2e6a0fb 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
@@ -5,19 +5,18 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-declare void @use32(i32*)
+declare void @use32(ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca(
-; CHECK: %[[BC:[^ ]*]] = bitcast { i32, [12 x i8] }* %x to i32*
; CHECK: %[[T1:[^ ]*]] = call i8 @__hwasan_generate_tag()
; CHECK: %[[A:[^ ]*]] = zext i8 %[[T1]] to i64
-; CHECK: %[[B:[^ ]*]] = ptrtoint i32* %[[BC]] to i64
+; CHECK: %[[B:[^ ]*]] = ptrtoint ptr %x to i64
; CHECK: %[[C:[^ ]*]] = shl i64 %[[A]], 56
; CHECK: or i64 %[[B]], %[[C]]
entry:
%x = alloca i32, align 4
- call void @use32(i32* nonnull %x)
+ call void @use32(ptr nonnull %x)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/atomic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/atomic.ll
index 4e87ff44abf23..37d4cb77286ca 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/atomic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/atomic.ll
@@ -5,26 +5,24 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-define void @atomicrmw(i64* %ptr) sanitize_hwaddress {
+define void @atomicrmw(ptr %ptr) sanitize_hwaddress {
; CHECK-LABEL: @atomicrmw(
-; CHECK: [[PTRI8:%[^ ]*]] = bitcast i64* %ptr to i8*
-; CHECK: call void @llvm.hwasan.check.memaccess({{.*}}, i8* [[PTRI8]], i32 19)
-; CHECK: atomicrmw add i64* %ptr, i64 1 seq_cst
+; CHECK: call void @llvm.hwasan.check.memaccess({{.*}}, ptr %ptr, i32 19)
+; CHECK: atomicrmw add ptr %ptr, i64 1 seq_cst
; CHECK: ret void
entry:
- %0 = atomicrmw add i64* %ptr, i64 1 seq_cst
+ %0 = atomicrmw add ptr %ptr, i64 1 seq_cst
ret void
}
-define void @cmpxchg(i64* %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
+define void @cmpxchg(ptr %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
; CHECK-LABEL: @cmpxchg(
-; CHECK: [[PTRI8:%[^ ]*]] = bitcast i64* %ptr to i8*
-; CHECK: call void @llvm.hwasan.check.memaccess({{.*}}, i8* [[PTRI8]], i32 19)
-; CHECK: cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
+; CHECK: call void @llvm.hwasan.check.memaccess({{.*}}, ptr %ptr, i32 19)
+; CHECK: cmpxchg ptr %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
; CHECK: ret void
entry:
- %0 = cmpxchg i64* %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
+ %0 = cmpxchg ptr %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/basic-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/basic-compat.ll
index 4263f2953b0f3..7b0097e866c79 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/basic-compat.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/basic-compat.ll
@@ -5,9 +5,9 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-define i8 @test_load8(i8* %a) sanitize_hwaddress {
+define i8 @test_load8(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load8(
-; CHECK: call void @llvm.hwasan.check.memaccess(i8* {{.*}}, i8* {{.*}}, i32 0)
- %b = load i8, i8* %a, align 4
+; CHECK: call void @llvm.hwasan.check.memaccess(ptr {{.*}}, ptr {{.*}}, i32 0)
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
index d4e4e11865630..30bbe642904aa 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
@@ -5,22 +5,22 @@
; RUN: opt < %s -passes=hwasan -hwasan-recover=0 -hwasan-mapping-offset=0 -S | FileCheck %s --check-prefixes=CHECK,ABORT
; RUN: opt < %s -passes=hwasan -hwasan-recover=1 -hwasan-mapping-offset=0 -S | FileCheck %s --check-prefixes=CHECK,RECOVER,RECOVER-ZERO-BASED-SHADOW
-; CHECK: @llvm.used = appending global [1 x i8*] [i8* bitcast (void ()* @hwasan.module_ctor to i8*)]
-; CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @hwasan.module_ctor, i8* bitcast (void ()* @hwasan.module_ctor to i8*) }]
+; CHECK: @llvm.used = appending global [1 x ptr] [ptr @hwasan.module_ctor]
+; CHECK: @llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 0, ptr @hwasan.module_ctor, ptr @hwasan.module_ctor }]
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android10000"
-define i8 @test_load8(i8* %a) sanitize_hwaddress {
+define i8 @test_load8(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load8(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label %[[MISMATCH:[0-9]*]], label %[[CONT:[0-9]*]], !prof {{.*}}
@@ -41,8 +41,8 @@ define i8 @test_load8(i8* %a) sanitize_hwaddress {
; RECOVER: [[INBOUNDS]]:
; RECOVER: %[[EOG_ADDR:[^ ]*]] = or i64 %[[C]], 15
-; RECOVER: %[[EOG_PTR:[^ ]*]] = inttoptr i64 %[[EOG_ADDR]] to i8*
-; RECOVER: %[[EOGTAG:[^ ]*]] = load i8, i8* %[[EOG_PTR]]
+; RECOVER: %[[EOG_PTR:[^ ]*]] = inttoptr i64 %[[EOG_ADDR]] to ptr
+; RECOVER: %[[EOGTAG:[^ ]*]] = load i8, ptr %[[EOG_PTR]]
; RECOVER: %[[EOG_MISMATCH:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[EOGTAG]]
; RECOVER: br i1 %[[EOG_MISMATCH]], label %[[FAIL]], label %[[CONT1:[0-9]*]], !prof {{.*}}
@@ -51,26 +51,26 @@ define i8 @test_load8(i8* %a) sanitize_hwaddress {
; RECOVER: [[CONT]]:
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %a, i32 0)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 0)
-; CHECK: %[[G:[^ ]*]] = load i8, i8* %a, align 4
+; CHECK: %[[G:[^ ]*]] = load i8, ptr %a, align 4
; CHECK: ret i8 %[[G]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i16 @test_load16(i16* %a) sanitize_hwaddress {
+define i16 @test_load16(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load16(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i16* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label %[[MISMATCH:[0-9]*]], label %[[CONT:[0-9]*]], !prof {{.*}}
@@ -91,8 +91,8 @@ define i16 @test_load16(i16* %a) sanitize_hwaddress {
; RECOVER: [[INBOUNDS]]:
; RECOVER: %[[EOG_ADDR:[^ ]*]] = or i64 %[[C]], 15
-; RECOVER: %[[EOG_PTR:[^ ]*]] = inttoptr i64 %[[EOG_ADDR]] to i8*
-; RECOVER: %[[EOGTAG:[^ ]*]] = load i8, i8* %[[EOG_PTR]]
+; RECOVER: %[[EOG_PTR:[^ ]*]] = inttoptr i64 %[[EOG_ADDR]] to ptr
+; RECOVER: %[[EOGTAG:[^ ]*]] = load i8, ptr %[[EOG_PTR]]
; RECOVER: %[[EOG_MISMATCH:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[EOGTAG]]
; RECOVER: br i1 %[[EOG_MISMATCH]], label %[[FAIL]], label %[[CONT1:[0-9]*]], !prof {{.*}}
@@ -101,301 +101,293 @@ define i16 @test_load16(i16* %a) sanitize_hwaddress {
; RECOVER: [[CONT]]:
-; ABORT: %[[A:[^ ]*]] = bitcast i16* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 1)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 1)
-; CHECK: %[[G:[^ ]*]] = load i16, i16* %a, align 4
+; CHECK: %[[G:[^ ]*]] = load i16, ptr %a, align 4
; CHECK: ret i16 %[[G]]
entry:
- %b = load i16, i16* %a, align 4
+ %b = load i16, ptr %a, align 4
ret i16 %b
}
-define i32 @test_load32(i32* %a) sanitize_hwaddress {
+define i32 @test_load32(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load32(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i32* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2338", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i32* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 2)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 2)
-; CHECK: %[[G:[^ ]*]] = load i32, i32* %a, align 4
+; CHECK: %[[G:[^ ]*]] = load i32, ptr %a, align 4
; CHECK: ret i32 %[[G]]
entry:
- %b = load i32, i32* %a, align 4
+ %b = load i32, ptr %a, align 4
ret i32 %b
}
-define i64 @test_load64(i64* %a) sanitize_hwaddress {
+define i64 @test_load64(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load64(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i64* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2339", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i64* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 3)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 3)
-; CHECK: %[[G:[^ ]*]] = load i64, i64* %a, align 8
+; CHECK: %[[G:[^ ]*]] = load i64, ptr %a, align 8
; CHECK: ret i64 %[[G]]
entry:
- %b = load i64, i64* %a, align 8
+ %b = load i64, ptr %a, align 8
ret i64 %b
}
-define i128 @test_load128(i128* %a) sanitize_hwaddress {
+define i128 @test_load128(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load128(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i128* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2340", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i128* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 4)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 4)
-; CHECK: %[[G:[^ ]*]] = load i128, i128* %a, align 16
+; CHECK: %[[G:[^ ]*]] = load i128, ptr %a, align 16
; CHECK: ret i128 %[[G]]
entry:
- %b = load i128, i128* %a, align 16
+ %b = load i128, ptr %a, align 16
ret i128 %b
}
-define i40 @test_load40(i40* %a) sanitize_hwaddress {
+define i40 @test_load40(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_loadN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_loadN_noabort(i64 %[[A]], i64 5)
-; CHECK: %[[B:[^ ]*]] = load i40, i40* %a
+; CHECK: %[[B:[^ ]*]] = load i40, ptr %a
; CHECK: ret i40 %[[B]]
entry:
- %b = load i40, i40* %a, align 4
+ %b = load i40, ptr %a, align 4
ret i40 %b
}
-define void @test_store8(i8* %a, i8 %b) sanitize_hwaddress {
+define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store8(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2352", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %a, i32 16)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 16)
-; CHECK: store i8 %b, i8* %a, align 4
+; CHECK: store i8 %b, ptr %a, align 4
; CHECK: ret void
entry:
- store i8 %b, i8* %a, align 4
+ store i8 %b, ptr %a, align 4
ret void
}
-define void @test_store16(i16* %a, i16 %b) sanitize_hwaddress {
+define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store16(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i16* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2353", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i16* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 17)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 17)
-; CHECK: store i16 %b, i16* %a, align 4
+; CHECK: store i16 %b, ptr %a, align 4
; CHECK: ret void
entry:
- store i16 %b, i16* %a, align 4
+ store i16 %b, ptr %a, align 4
ret void
}
-define void @test_store32(i32* %a, i32 %b) sanitize_hwaddress {
+define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store32(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i32* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2354", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i32* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 18)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 18)
-; CHECK: store i32 %b, i32* %a, align 4
+; CHECK: store i32 %b, ptr %a, align 4
; CHECK: ret void
entry:
- store i32 %b, i32* %a, align 4
+ store i32 %b, ptr %a, align 4
ret void
}
-define void @test_store64(i64* %a, i64 %b) sanitize_hwaddress {
+define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store64(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i64* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2355", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i64* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 19)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 19)
-; CHECK: store i64 %b, i64* %a, align 8
+; CHECK: store i64 %b, ptr %a, align 8
; CHECK: ret void
entry:
- store i64 %b, i64* %a, align 8
+ store i64 %b, ptr %a, align 8
ret void
}
-define void @test_store128(i128* %a, i128 %b) sanitize_hwaddress {
+define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store128(
-; RECOVER: %[[A:[^ ]*]] = ptrtoint i128* %a to i64
+; RECOVER: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; RECOVER: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; RECOVER: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; RECOVER: %[[C:[^ ]*]] = and i64 %[[A]], 72057594037927935
; RECOVER: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, i8* %.hwasan.shadow, i64 %4
-; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
-; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; RECOVER-DYNAMIC-SHADOW: %[[E:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %4
+; RECOVER-ZERO-BASED-SHADOW: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; RECOVER: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; RECOVER: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; RECOVER: br i1 %[[F]], label {{.*}}, label {{.*}}, !prof {{.*}}
; RECOVER: call void asm sideeffect "brk #2356", "{x0}"(i64 %[[A]])
; RECOVER: br label
-; ABORT: %[[A:[^ ]*]] = bitcast i128* %a to i8*
-; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(i8* %.hwasan.shadow, i8* %[[A]], i32 20)
+; ABORT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr %.hwasan.shadow, ptr %a, i32 20)
-; CHECK: store i128 %b, i128* %a, align 16
+; CHECK: store i128 %b, ptr %a, align 16
; CHECK: ret void
entry:
- store i128 %b, i128* %a, align 16
+ store i128 %b, ptr %a, align 16
ret void
}
-define void @test_store40(i40* %a, i40 %b) sanitize_hwaddress {
+define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_storeN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_storeN_noabort(i64 %[[A]], i64 5)
-; CHECK: store i40 %b, i40* %a
+; CHECK: store i40 %b, ptr %a
; CHECK: ret void
entry:
- store i40 %b, i40* %a, align 4
+ store i40 %b, ptr %a, align 4
ret void
}
-define void @test_store_unaligned(i64* %a, i64 %b) sanitize_hwaddress {
+define void @test_store_unaligned(ptr %a, i64 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store_unaligned(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_storeN(i64 %[[A]], i64 8)
; RECOVER: call void @__hwasan_storeN_noabort(i64 %[[A]], i64 8)
-; CHECK: store i64 %b, i64* %a, align 4
+; CHECK: store i64 %b, ptr %a, align 4
; CHECK: ret void
entry:
- store i64 %b, i64* %a, align 4
+ store i64 %b, ptr %a, align 4
ret void
}
-define i8 @test_load_noattr(i8* %a) {
+define i8 @test_load_noattr(ptr %a) {
; CHECK-LABEL: @test_load_noattr(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %[[B:[^ ]*]] = load i8, i8* %a
+; CHECK-NEXT: %[[B:[^ ]*]] = load i8, ptr %a
; CHECK-NEXT: ret i8 %[[B]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i8 @test_load_notmyattr(i8* %a) sanitize_address {
+define i8 @test_load_notmyattr(ptr %a) sanitize_address {
; CHECK-LABEL: @test_load_notmyattr(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %[[B:[^ ]*]] = load i8, i8* %a
+; CHECK-NEXT: %[[B:[^ ]*]] = load i8, ptr %a
; CHECK-NEXT: ret i8 %[[B]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i8 @test_load_addrspace(i8 addrspace(256)* %a) sanitize_hwaddress {
+define i8 @test_load_addrspace(ptr addrspace(256) %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load_addrspace(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %[[B:[^ ]*]] = load i8, i8 addrspace(256)* %a
+; CHECK-NEXT: %[[B:[^ ]*]] = load i8, ptr addrspace(256) %a
; CHECK-NEXT: ret i8 %[[B]]
entry:
- %b = load i8, i8 addrspace(256)* %a, align 4
+ %b = load i8, ptr addrspace(256) %a, align 4
ret i8 %b
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll b/llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll
index 8cd290ed5f7bf..d5e362bc800ad 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll
@@ -3,25 +3,25 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-declare void @g(i8**, i8**, i8**, i8**, i8**, i8**)
+declare void @g(ptr, ptr, ptr, ptr, ptr, ptr)
define void @f() sanitize_hwaddress !dbg !6 {
entry:
- %nodebug0 = alloca i8*
- %nodebug1 = alloca i8*
- %nodebug2 = alloca i8*
- %nodebug3 = alloca i8*
- %a = alloca i8*
- %b = alloca i8*
+ %nodebug0 = alloca ptr
+ %nodebug1 = alloca ptr
+ %nodebug2 = alloca ptr
+ %nodebug3 = alloca ptr
+ %a = alloca ptr
+ %b = alloca ptr
; CHECK: @llvm.dbg.declare{{.*}} !DIExpression(DW_OP_LLVM_tag_offset, 32)
- call void @llvm.dbg.declare(metadata i8** %a, metadata !12, metadata !DIExpression()), !dbg !14
+ call void @llvm.dbg.declare(metadata ptr %a, metadata !12, metadata !DIExpression()), !dbg !14
; CHECK: @llvm.dbg.declare{{.*}} !DIExpression(DW_OP_LLVM_tag_offset, 32)
- call void @llvm.dbg.declare(metadata i8** %a, metadata !12, metadata !DIExpression()), !dbg !14
+ call void @llvm.dbg.declare(metadata ptr %a, metadata !12, metadata !DIExpression()), !dbg !14
; CHECK: @llvm.dbg.declare{{.*}} !DIExpression(DW_OP_LLVM_tag_offset, 96)
- call void @llvm.dbg.declare(metadata i8** %b, metadata !13, metadata !DIExpression()), !dbg !14
+ call void @llvm.dbg.declare(metadata ptr %b, metadata !13, metadata !DIExpression()), !dbg !14
; CHECK: @llvm.dbg.declare{{.*}} !DIExpression(DW_OP_LLVM_tag_offset, 96)
- call void @llvm.dbg.declare(metadata i8** %b, metadata !13, metadata !DIExpression()), !dbg !14
- call void @g(i8** %nodebug0, i8** %nodebug1, i8** %nodebug2, i8** %nodebug3, i8** %a, i8** %b)
+ call void @llvm.dbg.declare(metadata ptr %b, metadata !13, metadata !DIExpression()), !dbg !14
+ call void @g(ptr %nodebug0, ptr %nodebug1, ptr %nodebug2, ptr %nodebug3, ptr %a, ptr %b)
ret void, !dbg !15
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset-nopad.ll b/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset-nopad.ll
index 80f6acc90d956..05df221abd812 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset-nopad.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset-nopad.ll
@@ -6,21 +6,19 @@ target triple = "aarch64-unknown-linux-android24"
define dso_local void @f() sanitize_hwaddress !dbg !14 {
%a1 = alloca i128, align 4
%a2 = alloca i128, align 4
- %1 = bitcast i128* %a1 to i8*, !dbg !21
- %2 = bitcast i128* %a2 to i8*, !dbg !21
; CHECK: call void @llvm.dbg.value(metadata i128 1, {{.*}}, metadata !DIExpression())
call void @llvm.dbg.value(metadata i128 1, metadata !20, metadata !DIExpression()), !dbg !22
- store i128 1, i128* %a2, align 4, !dbg !23, !tbaa !24
-; CHECK: call void @llvm.dbg.value(metadata i128* %a1, {{.*}}, metadata !DIExpression(DW_OP_LLVM_tag_offset, 0, DW_OP_deref))
- call void @llvm.dbg.value(metadata i128* %a1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !22
- call void @use(i8* nonnull %1), !dbg !28
-; CHECK: call void @llvm.dbg.value(metadata i128* %a2, {{.*}}, metadata !DIExpression(DW_OP_LLVM_tag_offset, 128, DW_OP_deref))
- call void @llvm.dbg.value(metadata i128* %a2, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
- call void @use(i8* nonnull %2), !dbg !29
+ store i128 1, ptr %a2, align 4, !dbg !23, !tbaa !24
+; CHECK: call void @llvm.dbg.value(metadata ptr %a1, {{.*}}, metadata !DIExpression(DW_OP_LLVM_tag_offset, 0, DW_OP_deref))
+ call void @llvm.dbg.value(metadata ptr %a1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !22
+ call void @use(ptr nonnull %a1), !dbg !28
+; CHECK: call void @llvm.dbg.value(metadata ptr %a2, {{.*}}, metadata !DIExpression(DW_OP_LLVM_tag_offset, 128, DW_OP_deref))
+ call void @llvm.dbg.value(metadata ptr %a2, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
+ call void @use(ptr nonnull %a2), !dbg !29
ret void, !dbg !30
}
-declare !dbg !5 void @use(i8*)
+declare !dbg !5 void @use(ptr)
declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset.ll b/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset.ll
index 609783b44df89..8cba9fb359274 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset.ll
@@ -6,23 +6,19 @@ target triple = "aarch64-unknown-linux-android24"
define dso_local void @f() sanitize_hwaddress !dbg !14 {
%a1 = alloca i32, align 4
%a2 = alloca i32, align 4
- %1 = bitcast i32* %a1 to i8*, !dbg !21
- %2 = bitcast i32* %a2 to i8*, !dbg !21
-; CHECK: {{[ ]*}}[[BITCASTa1:.*]] = bitcast { i32, [12 x i8] }* %a1 to i32*
-; CHECK: {{[ ]*}}[[BITCASTa2:.*]] = bitcast { i32, [12 x i8] }* %a2 to i32*
; CHECK: call void @llvm.dbg.value(metadata i32 1, {{.*}}, metadata !DIExpression())
call void @llvm.dbg.value(metadata i32 1, metadata !20, metadata !DIExpression()), !dbg !22
- store i32 1, i32* %a2, align 4, !dbg !23, !tbaa !24
-; CHECK: call void @llvm.dbg.value(metadata i32* {{.*}}[[BITCASTa1]], {{.*}} metadata !DIExpression(DW_OP_LLVM_tag_offset, 0, DW_OP_deref))
- call void @llvm.dbg.value(metadata i32* %a1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !22
- call void @use(i8* nonnull %1), !dbg !28
-; CHECK: call void @llvm.dbg.value(metadata i32* {{.*}}[[BITCASTa2]], {{.*}} metadata !DIExpression(DW_OP_LLVM_tag_offset, 128, DW_OP_deref))
- call void @llvm.dbg.value(metadata i32* %a2, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
- call void @use(i8* nonnull %2), !dbg !29
+ store i32 1, ptr %a2, align 4, !dbg !23, !tbaa !24
+; CHECK: call void @llvm.dbg.value(metadata ptr %a1, {{.*}} metadata !DIExpression(DW_OP_LLVM_tag_offset, 0, DW_OP_deref))
+ call void @llvm.dbg.value(metadata ptr %a1, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !22
+ call void @use(ptr nonnull %a1), !dbg !28
+; CHECK: call void @llvm.dbg.value(metadata ptr %a2, {{.*}} metadata !DIExpression(DW_OP_LLVM_tag_offset, 128, DW_OP_deref))
+ call void @llvm.dbg.value(metadata ptr %a2, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
+ call void @use(ptr nonnull %a2), !dbg !29
ret void, !dbg !30
}
-declare !dbg !5 void @use(i8*)
+declare !dbg !5 void @use(ptr)
declare void @llvm.dbg.value(metadata, metadata, metadata)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
index 936a1094bc504..ab52691a320a9 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
@@ -6,55 +6,50 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-declare void @mayFail(i32* %x) sanitize_hwaddress
-declare void @onExcept(i32* %x) sanitize_hwaddress
+declare void @mayFail(ptr %x) sanitize_hwaddress
+declare void @onExcept(ptr %x) sanitize_hwaddress
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind
declare i32 @__gxx_personality_v0(...)
-define void @test() sanitize_hwaddress personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
entry:
%x = alloca i32, align 8
- %exn.slot = alloca i8*, align 8
+ %exn.slot = alloca ptr, align 8
%ehselector.slot = alloca i32, align 4
- %0 = bitcast i32* %x to i8*
- call void @llvm.lifetime.start.p0i8(i64 8, i8* %0)
- invoke void @mayFail(i32* %x) to label %invoke.cont unwind label %lpad
-; CHECK: [[CAST:%.*]] = bitcast { i32, [12 x i8] }* %x to i32*
-; CHECK: [[TMP1:%.*]] = bitcast i32* {{.*}}[[CAST]] to i8*
+ call void @llvm.lifetime.start.p0(i64 8, ptr %x)
+ invoke void @mayFail(ptr %x) to label %invoke.cont unwind label %lpad
invoke.cont: ; preds = %entry
; CHECK: invoke.cont:
-; CHECK: call void @llvm.memset.p0i8.i64(i8* align 1 %{{.*}}, i8 0, i64 1, i1 false)
-; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* {{.*}}[[TMP1]])
+; CHECK: call void @llvm.memset.p0.i64(ptr align 1 %{{.*}}, i8 0, i64 1, i1 false)
+; CHECK: call void @llvm.lifetime.end.p0(i64 16, ptr {{.*}}{{.*}}%x)
; CHECK: ret void
- %1 = bitcast i32* %x to i8*
- call void @llvm.lifetime.end.p0i8(i64 8, i8* %1)
+ call void @llvm.lifetime.end.p0(i64 8, ptr %x)
ret void
lpad: ; preds = %entry
; CHECK: lpad
-; CHECK: call void @llvm.memset.p0i8.i64(i8* align 1 %{{.*}}, i8 0, i64 1, i1 false)
-; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* {{.*}}[[TMP1]])
+; CHECK: call void @llvm.memset.p0.i64(ptr align 1 %{{.*}}, i8 0, i64 1, i1 false)
+; CHECK: call void @llvm.lifetime.end.p0(i64 16, ptr {{.*}}{{.*}}%x)
; CHECK: br label %eh.resume
- %2 = landingpad { i8*, i32 }
+ %0 = landingpad { ptr, i32 }
cleanup
- %3 = extractvalue { i8*, i32 } %2, 0
- store i8* %3, i8** %exn.slot, align 8
- %4 = extractvalue { i8*, i32 } %2, 1
- store i32 %4, i32* %ehselector.slot, align 4
- call void @onExcept(i32* %x) #18
- %5 = bitcast i32* %x to i8*
- call void @llvm.lifetime.end.p0i8(i64 8, i8* %5)
+ %1 = extractvalue { ptr, i32 } %0, 0
+ store ptr %1, ptr %exn.slot, align 8
+ %2 = extractvalue { ptr, i32 } %0, 1
+ store i32 %2, ptr %ehselector.slot, align 4
+ call void @onExcept(ptr %x) #18
+ call void @llvm.lifetime.end.p0(i64 8, ptr %x)
br label %eh.resume
eh.resume: ; preds = %lpad
- %exn = load i8*, i8** %exn.slot, align 8
- %sel = load i32, i32* %ehselector.slot, align 4
- %lpad.val = insertvalue { i8*, i32 } undef, i8* %exn, 0
- %lpad.val1 = insertvalue { i8*, i32 } %lpad.val, i32 %sel, 1
- resume { i8*, i32 } %lpad.val1
+ %exn = load ptr, ptr %exn.slot, align 8
+ %sel = load i32, ptr %ehselector.slot, align 4
+ %lpad.val = insertvalue { ptr, i32 } undef, ptr %exn, 0
+ %lpad.val1 = insertvalue { ptr, i32 } %lpad.val, i32 %sel, 1
+ resume { ptr, i32 } %lpad.val1
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/fuchsia.ll b/llvm/test/Instrumentation/HWAddressSanitizer/fuchsia.ll
index b477a6869dd1a..89913d16d4706 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/fuchsia.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/fuchsia.ll
@@ -1,9 +1,9 @@
; Check HWASan shadow mapping on Fuchsia.
; RUN: opt -passes=hwasan -S -mtriple=aarch64-unknown-fuchsia < %s | FileCheck %s
-define i32 @test_load(i32* %a) sanitize_hwaddress {
-; CHECK: %.hwasan.shadow = call i8* asm "", "=r,0"(i8* null)
+define i32 @test_load(ptr %a) sanitize_hwaddress {
+; CHECK: %.hwasan.shadow = call ptr asm "", "=r,0"(ptr null)
entry:
- %x = load i32, i32* %a, align 4
+ %x = load i32, ptr %a, align 4
ret i32 %x
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
index d15d3183f7fdf..92ff51ac7c184 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
@@ -5,26 +5,25 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-declare void @use32(i32*)
+declare void @use32(ptr)
define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca(
-; CHECK: %[[FP:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %[[FP]] to i64
+; CHECK: %[[FP:[^ ]*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %[[FP]] to i64
; CHECK: %[[B:[^ ]*]] = lshr i64 %[[A]], 20
; CHECK: %[[BASE_TAG:[^ ]*]] = xor i64 %[[A]], %[[B]]
; CHECK: %[[X:[^ ]*]] = alloca { i32, [12 x i8] }, align 16
-; CHECK: %[[X_BC:[^ ]*]] = bitcast { i32, [12 x i8] }* %[[X]] to i32*
; CHECK: %[[X_TAG:[^ ]*]] = xor i64 %[[BASE_TAG]], 0
-; CHECK: %[[X1:[^ ]*]] = ptrtoint i32* %[[X_BC]] to i64
+; CHECK: %[[X1:[^ ]*]] = ptrtoint ptr %[[X]] to i64
; CHECK: %[[C:[^ ]*]] = shl i64 %[[X_TAG]], 56
; CHECK: %[[D:[^ ]*]] = or i64 %[[C]], 72057594037927935
; CHECK: %[[E:[^ ]*]] = and i64 %[[X1]], %[[D]]
-; CHECK: %[[X_HWASAN:[^ ]*]] = inttoptr i64 %[[E]] to i32*
+; CHECK: %[[X_HWASAN:[^ ]*]] = inttoptr i64 %[[E]] to ptr
entry:
%x = alloca i32, align 4
- call void @use32(i32* nonnull %x)
+ call void @use32(ptr nonnull %x)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-inline.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-inline.ll
index 01af976a75272..956188b496571 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-inline.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-inline.ll
@@ -6,12 +6,12 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
-define void @test_load(i32* %a, i64* %b, i512* %c, i80* %d) sanitize_address {
+define void @test_load(ptr %a, ptr %b, ptr %c, ptr %d) sanitize_address {
entry:
- %tmp1 = load i32, i32* %a, align 4
- %tmp2 = load i64, i64* %b, align 8
- %tmp3 = load i512, i512* %c, align 32
- %tmp4 = load i80, i80* %d, align 8
+ %tmp1 = load i32, ptr %a, align 4
+ %tmp2 = load i64, ptr %b, align 8
+ %tmp3 = load i512, ptr %c, align 32
+ %tmp4 = load i80, ptr %d, align 8
ret void
}
; CHECK-INLINE: call void @__asan_report_load4_noabort
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
index ec735a562856b..3d89f5d87abba 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll
@@ -9,20 +9,20 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-define i8 @test_load(i8* %a) sanitize_hwaddress {
+define i8 @test_load(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load(
-; OFFSET: %[[SHADOW:[^ ]*]] = call i8* asm "", "=r,0"(i8* inttoptr (i64 12345678 to i8*))
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; OFFSET: %[[SHADOW:[^ ]*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 12345678 to ptr))
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; CHECK: %[[B:[^ ]*]] = lshr i64 %[[A]], 56
; CHECK: %[[PTRTAG:[^ ]*]] = trunc i64 %[[B]] to i8
; CHECK: %[[C:[^ ]*]] = or i64 %[[A]], -72057594037927936
; CHECK: %[[D:[^ ]*]] = lshr i64 %[[C]], 4
-; NOOFFSET: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to i8*
+; NOOFFSET: %[[E:[^ ]*]] = inttoptr i64 %[[D]] to ptr
-; OFFSET: %[[E:[^ ]*]] = getelementptr i8, i8* %[[SHADOW]], i64 %[[D]]
+; OFFSET: %[[E:[^ ]*]] = getelementptr i8, ptr %[[SHADOW]], i64 %[[D]]
-; CHECK: %[[MEMTAG:[^ ]*]] = load i8, i8* %[[E]]
+; CHECK: %[[MEMTAG:[^ ]*]] = load i8, ptr %[[E]]
; CHECK: %[[F:[^ ]*]] = icmp ne i8 %[[PTRTAG]], %[[MEMTAG]]
; MATCH-ALL: %[[G:[^ ]*]] = icmp ne i8 %[[PTRTAG]], -1
@@ -34,13 +34,13 @@ define i8 @test_load(i8* %a) sanitize_hwaddress {
; CHECK: call void asm sideeffect "brk #2336", "{x0}"(i64 %[[A]])
; CHECK: br label
-; CHECK: %[[G:[^ ]*]] = load i8, i8* %a, align 4
+; CHECK: %[[G:[^ ]*]] = load i8, ptr %a, align 4
; CHECK: ret i8 %[[G]]
-; OUTLINE: %[[SHADOW:[^ ]*]] = call i8* asm "", "=r,0"(i8* inttoptr (i64 12345678 to i8*))
-; OUTLINE: call void @llvm.hwasan.check.memaccess(i8* %[[SHADOW]], i8* %a, i32 67043360)
+; OUTLINE: %[[SHADOW:[^ ]*]] = call ptr asm "", "=r,0"(ptr inttoptr (i64 12345678 to ptr))
+; OUTLINE: call void @llvm.hwasan.check.memaccess(ptr %[[SHADOW]], ptr %a, i32 67043360)
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll b/llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll
index 2a2cc347d2b01..69832b2f2d288 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll
@@ -5,23 +5,23 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-android"
-define i32 @f() local_unnamed_addr sanitize_hwaddress personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define i32 @f() local_unnamed_addr sanitize_hwaddress personality ptr @__gxx_personality_v0 {
entry:
invoke void @g()
to label %return unwind label %lpad
lpad:
- ; COMMON: landingpad { i8*, i32 }
- ; COMMON-NEXT: catch i8* null
- %0 = landingpad { i8*, i32 }
- catch i8* null
+ ; COMMON: landingpad { ptr, i32 }
+ ; COMMON-NEXT: catch ptr null
+ %0 = landingpad { ptr, i32 }
+ catch ptr null
; NOLP-NOT: call void @__hwasan_handle_vfork
; LP-NEXT: %[[X:[^ ]*]] = call i64 @llvm.read_register.i64(metadata ![[META:[^ ]*]])
; LP-NEXT: call void @__hwasan_handle_vfork(i64 %[[X]])
- %1 = extractvalue { i8*, i32 } %0, 0
- %2 = tail call i8* @__cxa_begin_catch(i8* %1)
+ %1 = extractvalue { ptr, i32 } %0, 0
+ %2 = tail call ptr @__cxa_begin_catch(ptr %1)
tail call void @__cxa_end_catch()
br label %return
return:
@@ -32,7 +32,7 @@ return:
declare void @g() local_unnamed_addr
declare i32 @__gxx_personality_v0(...)
-declare i8* @__cxa_begin_catch(i8*) local_unnamed_addr
+declare ptr @__cxa_begin_catch(ptr) local_unnamed_addr
declare void @__cxa_end_catch() local_unnamed_addr
; ARM: ![[META]] = !{!"sp"}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll b/llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll
index 45d5e3e20fc37..aea3a341ddd90 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll
@@ -12,44 +12,39 @@ entry:
%retval = alloca i32, align 4
%Q = alloca [10 x i8], align 1
%P = alloca [10 x i8], align 1
- store i32 0, i32* %retval, align 4
- %arraydecay = getelementptr inbounds [10 x i8], [10 x i8]* %Q, i32 0, i32 0
+ store i32 0, ptr %retval, align 4
- call void @llvm.memset.p0i8.i64(i8* align 1 %arraydecay, i8 0, i64 10, i1 false)
-; CHECK-PREFIX: call i8* @__hwasan_memset
-; CHECK-NOPREFIX: call i8* @memset
+ call void @llvm.memset.p0.i64(ptr align 1 %Q, i8 0, i64 10, i1 false)
+; CHECK-PREFIX: call ptr @__hwasan_memset
+; CHECK-NOPREFIX: call ptr @memset
- %arraydecay1 = getelementptr inbounds [10 x i8], [10 x i8]* %Q, i32 0, i32 0
- %arraydecay2 = getelementptr inbounds [10 x i8], [10 x i8]* %Q, i32 0, i32 0
- %add.ptr = getelementptr inbounds i8, i8* %arraydecay2, i64 5
+ %add.ptr = getelementptr inbounds i8, ptr %Q, i64 5
- call void @llvm.memmove.p0i8.p0i8.i64(i8* align 1 %arraydecay1, i8* align 1 %add.ptr, i64 5, i1 false)
-; CHECK-PREFIX: call i8* @__hwasan_memmove
-; CHECK-NOPREFIX: call i8* @memmove
+ call void @llvm.memmove.p0.p0.i64(ptr align 1 %Q, ptr align 1 %add.ptr, i64 5, i1 false)
+; CHECK-PREFIX: call ptr @__hwasan_memmove
+; CHECK-NOPREFIX: call ptr @memmove
- %arraydecay3 = getelementptr inbounds [10 x i8], [10 x i8]* %P, i32 0, i32 0
- %arraydecay4 = getelementptr inbounds [10 x i8], [10 x i8]* %Q, i32 0, i32 0
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %arraydecay3, i8* align 1 %arraydecay4, i64 10, i1 false)
-; CHECK-PREFIX: call i8* @__hwasan_memcpy
-; CHECK-NOPREFIX: call i8* @memcpy
+ call void @llvm.memcpy.p0.p0.i64(ptr align 1 %P, ptr align 1 %Q, i64 10, i1 false)
+; CHECK-PREFIX: call ptr @__hwasan_memcpy
+; CHECK-NOPREFIX: call ptr @memcpy
ret i32 0
}
; Function Attrs: argmemonly nounwind
-declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1) #1
+declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1) #1
; Function Attrs: argmemonly nounwind
-declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
+declare void @llvm.memmove.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1) #1
; Function Attrs: argmemonly nounwind
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #1
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
-define void @memintr_test_nosanitize(i8* %a, i8* %b) nounwind uwtable {
+define void @memintr_test_nosanitize(ptr %a, ptr %b) nounwind uwtable {
entry:
- tail call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 100, i1 false)
- tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %a, i8* %b, i64 100, i1 false)
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %b, i64 100, i1 false)
+ tail call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 100, i1 false)
+ tail call void @llvm.memmove.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false)
+ tail call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %b, i64 100, i1 false)
ret void
}
; CHECK-LABEL: memintr_test_nosanitize
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll b/llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll
index 3704da6b0835d..cad68af3456aa 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll
@@ -5,19 +5,19 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android10000"
-declare void @use32(i32*)
+declare void @use32(ptr)
define i32 @test_alloca() sanitize_hwaddress {
entry:
%x = alloca i32, align 4
; CHECK: call void @use32
- call void @use32(i32* nonnull %x)
+ call void @use32(ptr nonnull %x)
; CHECK: [[A:[0-9]+]] = MemoryDef({{[0-9]+}})
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules
; CHECK: MemoryUse([[A]])
- ; CHECK-NEXT: load i32, i32* %x.hwasan
- %y = load i32, i32* %x
+ ; CHECK-NEXT: load i32, ptr %x.hwasan
+ %y = load i32, ptr %x
; CHECK: {{[0-9]+}} = MemoryDef([[A]])
- ; CHECK-NEXT: call void @llvm.memset.p0i8.i64
+ ; CHECK-NEXT: call void @llvm.memset.p0.i64
ret i32 %y
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll b/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
index f36e2c16df029..7b30f10703e16 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/musttail.ll
@@ -8,23 +8,23 @@ target triple = "aarch64-arm-unknown-eabi"
define dso_local noundef i32 @_Z3bari(i32 noundef %0) sanitize_hwaddress {
%2 = alloca i32, align 4
- store i32 %0, i32* %2, align 4
- %3 = load i32, i32* %2, align 4
+ store i32 %0, ptr %2, align 4
+ %3 = load i32, ptr %2, align 4
ret i32 %3
}
define dso_local noundef i32 @_Z3fooi(i32 noundef %0) sanitize_hwaddress {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
- store i32 %0, i32* %2, align 4
- store volatile i32 5, i32* %3, align 4
- %4 = load i32, i32* %2, align 4
- %5 = load volatile i32, i32* %3, align 4
+ store i32 %0, ptr %2, align 4
+ store volatile i32 5, ptr %3, align 4
+ %4 = load i32, ptr %2, align 4
+ %5 = load volatile i32, ptr %3, align 4
%6 = add nsw i32 %4, %5
; Check we untag before the musttail.
- ; CHECK: call void @llvm.memset.p0i8.i64
+ ; CHECK: call void @llvm.memset.p0.i64
; CHECK: musttail call
- ; CHECK-NOT: call void @llvm.memset.p0i8.i64
+ ; CHECK-NOT: call void @llvm.memset.p0.i64
%7 = musttail call noundef i32 @_Z3bari(i32 noundef %6)
ret i32 %7
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/personality.ll b/llvm/test/Instrumentation/HWAddressSanitizer/personality.ll
index a0ee5d28b7961..54b7b70dfa863 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/personality.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/personality.ll
@@ -11,16 +11,16 @@ define void @nostack() sanitize_hwaddress {
; PERS: personality {{.*}} @__hwasan_personality_thunk
define void @stack1() sanitize_hwaddress {
%p = alloca i8
- call void @sink(i8* %p)
+ call void @sink(ptr %p)
ret void
}
-; NOPERS: personality void ()* @global
+; NOPERS: personality ptr @global
; PERS: personality {{.*}} @__hwasan_personality_thunk.global
-define void @stack2() sanitize_hwaddress personality void ()* @global {
+define void @stack2() sanitize_hwaddress personality ptr @global {
%p = alloca i8
- call void @sink(i8* %p)
+ call void @sink(ptr %p)
ret void
}
@@ -28,63 +28,63 @@ define internal void @local() {
ret void
}
- at local_alias = internal alias void (), void ()* @local
+ at local_alias = internal alias void (), ptr @local
-; NOPERS: personality void ()* @local
+; NOPERS: personality ptr @local
; PERS: personality {{.*}} @__hwasan_personality_thunk.local
-define void @stack3() sanitize_hwaddress personality void ()* @local {
+define void @stack3() sanitize_hwaddress personality ptr @local {
%p = alloca i8
- call void @sink(i8* %p)
+ call void @sink(ptr %p)
ret void
}
-; NOPERS: personality void ()* @local_alias
+; NOPERS: personality ptr @local_alias
; PERS: personality {{.*}} @__hwasan_personality_thunk.local_alias
-define void @stack4() sanitize_hwaddress personality void ()* @local_alias {
+define void @stack4() sanitize_hwaddress personality ptr @local_alias {
%p = alloca i8
- call void @sink(i8* %p)
+ call void @sink(ptr %p)
ret void
}
-; NOPERS: personality void ()* inttoptr (i64 1 to void ()*)
-; PERS: personality i32 (i32, i32, i64, i8*, i8*)* @__hwasan_personality_thunk.
-define void @stack5() sanitize_hwaddress personality void ()* inttoptr (i64 1 to void ()*) {
+; NOPERS: personality ptr inttoptr (i64 1 to ptr)
+; PERS: personality ptr @__hwasan_personality_thunk.
+define void @stack5() sanitize_hwaddress personality ptr inttoptr (i64 1 to ptr) {
%p = alloca i8
- call void @sink(i8* %p)
+ call void @sink(ptr %p)
ret void
}
-; NOPERS: personality void ()* inttoptr (i64 2 to void ()*)
-; PERS: personality i32 (i32, i32, i64, i8*, i8*)* @__hwasan_personality_thunk..1
-define void @stack6() sanitize_hwaddress personality void ()* inttoptr (i64 2 to void ()*) {
+; NOPERS: personality ptr inttoptr (i64 2 to ptr)
+; PERS: personality ptr @__hwasan_personality_thunk..1
+define void @stack6() sanitize_hwaddress personality ptr inttoptr (i64 2 to ptr) {
%p = alloca i8
- call void @sink(i8* %p)
+ call void @sink(ptr %p)
ret void
}
declare void @global()
-declare void @sink(i8*)
+declare void @sink(ptr)
-; PERS: define linkonce_odr hidden i32 @__hwasan_personality_thunk(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4) comdat
-; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4, i8* null, i8* bitcast (void ()* @_Unwind_GetGR to i8*), i8* bitcast (void ()* @_Unwind_GetCFA to i8*))
+; PERS: define linkonce_odr hidden i32 @__hwasan_personality_thunk(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4) comdat
+; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4, ptr null, ptr @_Unwind_GetGR, ptr @_Unwind_GetCFA)
; PERS: ret i32 %5
-; PERS: define linkonce_odr hidden i32 @__hwasan_personality_thunk.global(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4) comdat
-; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4, i8* bitcast (void ()* @global to i8*), i8* bitcast (void ()* @_Unwind_GetGR to i8*), i8* bitcast (void ()* @_Unwind_GetCFA to i8*))
+; PERS: define linkonce_odr hidden i32 @__hwasan_personality_thunk.global(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4) comdat
+; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4, ptr @global, ptr @_Unwind_GetGR, ptr @_Unwind_GetCFA)
; PERS: ret i32 %5
-; PERS: define internal i32 @__hwasan_personality_thunk.local(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4)
-; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4, i8* bitcast (void ()* @local to i8*), i8* bitcast (void ()* @_Unwind_GetGR to i8*), i8* bitcast (void ()* @_Unwind_GetCFA to i8*))
+; PERS: define internal i32 @__hwasan_personality_thunk.local(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4)
+; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4, ptr @local, ptr @_Unwind_GetGR, ptr @_Unwind_GetCFA)
; PERS: ret i32 %5
-; PERS: define internal i32 @__hwasan_personality_thunk.local_alias(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4)
-; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4, i8* bitcast (void ()* @local_alias to i8*), i8* bitcast (void ()* @_Unwind_GetGR to i8*), i8* bitcast (void ()* @_Unwind_GetCFA to i8*))
+; PERS: define internal i32 @__hwasan_personality_thunk.local_alias(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4)
+; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4, ptr @local_alias, ptr @_Unwind_GetGR, ptr @_Unwind_GetCFA)
; PERS: ret i32 %5
-; PERS: define internal i32 @__hwasan_personality_thunk.(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4) {
-; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4, i8* inttoptr (i64 1 to i8*), i8* bitcast (void ()* @_Unwind_GetGR to i8*), i8* bitcast (void ()* @_Unwind_GetCFA to i8*))
+; PERS: define internal i32 @__hwasan_personality_thunk.(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4) {
+; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4, ptr inttoptr (i64 1 to ptr), ptr @_Unwind_GetGR, ptr @_Unwind_GetCFA)
; PERS: ret i32 %5
-; PERS: define internal i32 @__hwasan_personality_thunk..1(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4) {
-; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, i8* %3, i8* %4, i8* inttoptr (i64 2 to i8*), i8* bitcast (void ()* @_Unwind_GetGR to i8*), i8* bitcast (void ()* @_Unwind_GetCFA to i8*))
+; PERS: define internal i32 @__hwasan_personality_thunk..1(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4) {
+; PERS: %5 = tail call i32 @__hwasan_personality_wrapper(i32 %0, i32 %1, i64 %2, ptr %3, ptr %4, ptr inttoptr (i64 2 to ptr), ptr @_Unwind_GetGR, ptr @_Unwind_GetCFA)
; PERS: ret i32 %5
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
index 5466c061759fa..5a405a32a2a75 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
@@ -21,18 +21,18 @@ target triple = "aarch64--linux-android22"
; CHECK-IFUNC: @__hwasan_shadow = external global [0 x i8]
; CHECK-NOIFUNC: @__hwasan_shadow_memory_dynamic_address = external global i64
-define i32 @test_load(i32* %a) sanitize_hwaddress {
+define i32 @test_load(ptr %a) sanitize_hwaddress {
; First instrumentation in the function must be to load the dynamic shadow
; address into a local variable.
; CHECK-LABEL: @test_load
; CHECK: entry:
-; CHECK-NOGLOBAL: %[[A:[^ ]*]] = call i8* asm "", "=r,0"([0 x i8]* @__hwasan_shadow)
-; CHECK-NOGLOBAL: @llvm.hwasan.check.memaccess(i8* %[[A]]
-; CHECK-ZERO-OFFSET: %[[A:[^ ]*]] = call i8* asm "", "=r,0"(i8* null)
-; CHECK-SHORT-GRANULES: @llvm.hwasan.check.memaccess.shortgranules(i8* %[[A]]
+; CHECK-NOGLOBAL: %[[A:[^ ]*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)
+; CHECK-NOGLOBAL: @llvm.hwasan.check.memaccess(ptr %[[A]]
+; CHECK-ZERO-OFFSET: %[[A:[^ ]*]] = call ptr asm "", "=r,0"(ptr null)
+; CHECK-SHORT-GRANULES: @llvm.hwasan.check.memaccess.shortgranules(ptr %[[A]]
-; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
+; CHECK-GLOBAL: load ptr, ptr @__hwasan_shadow_memory_dynamic_address
; "store i64" is only used to update stack history (this input IR intentionally does not use any i64)
; W/o any allocas, the history is not updated, even if it is enabled explicitly with -hwasan-record-stack-history=1
@@ -41,11 +41,11 @@ define i32 @test_load(i32* %a) sanitize_hwaddress {
; CHECK: ret i32
entry:
- %x = load i32, i32* %a, align 4
+ %x = load i32, ptr %a, align 4
ret i32 %x
}
-declare void @use(i32* %p)
+declare void @use(ptr %p)
define void @test_alloca() sanitize_hwaddress {
; First instrumentation in the function must be to load the dynamic shadow
@@ -53,37 +53,36 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca
; CHECK: entry:
-; CHECK-IFUNC: %[[A:[^ ]*]] = call i8* asm "", "=r,0"([0 x i8]* @__hwasan_shadow)
-; CHECK-IFUNC: getelementptr i8, i8* %[[A]]
+; CHECK-IFUNC: %[[A:[^ ]*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)
+; CHECK-IFUNC: getelementptr i8, ptr %[[A]]
-; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
+; CHECK-GLOBAL: load ptr, ptr @__hwasan_shadow_memory_dynamic_address
-; CHECK-TLS-SLOT: %[[A:[^ ]*]] = call i8* @llvm.thread.pointer()
-; CHECK-TLS-SLOT: %[[B:[^ ]*]] = getelementptr i8, i8* %[[A]], i32 48
-; CHECK-TLS-SLOT: %[[C:[^ ]*]] = bitcast i8* %[[B]] to i64*
-; CHECK-TLS-SLOT: %[[D:[^ ]*]] = load i64, i64* %[[C]]
+; CHECK-TLS-SLOT: %[[A:[^ ]*]] = call ptr @llvm.thread.pointer()
+; CHECK-TLS-SLOT: %[[B:[^ ]*]] = getelementptr i8, ptr %[[A]], i32 48
+; CHECK-TLS-SLOT: %[[D:[^ ]*]] = load i64, ptr %[[B]]
; CHECK-TLS-SLOT: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
-; CHECK-HWASAN-TLS: %[[D:[^ ]*]] = load i64, i64* @__hwasan_tls, align 8
+; CHECK-HWASAN-TLS: %[[D:[^ ]*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-HWASAN-TLS: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
; CHECK-NOHISTORY-NOT: store i64
; When watching stack history, all code paths attempt to get PC and SP and mix them together.
; CHECK-HISTORY: %[[PC:[^ ]*]] = call i64 @llvm.read_register.i64(metadata [[MD:![0-9]*]])
-; CHECK-HISTORY: %[[SP0:[^ ]*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; CHECK-HISTORY: %[[SP1:[^ ]*]] = ptrtoint i8* %[[SP0]] to i64
+; CHECK-HISTORY: %[[SP0:[^ ]*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; CHECK-HISTORY: %[[SP1:[^ ]*]] = ptrtoint ptr %[[SP0]] to i64
; CHECK-HISTORY: %[[SP2:[^ ]*]] = shl i64 %[[SP1]], 44
; CHECK-HISTORY: %[[MIX:[^ ]*]] = or i64 %[[PC]], %[[SP2]]
-; CHECK-HISTORY-TLS: %[[PTR:[^ ]*]] = inttoptr i64 %[[D]] to i64*
-; CHECK-HISTORY-TLS: store i64 %[[MIX]], i64* %[[PTR]]
+; CHECK-HISTORY-TLS: %[[PTR:[^ ]*]] = inttoptr i64 %[[D]] to ptr
+; CHECK-HISTORY-TLS: store i64 %[[MIX]], ptr %[[PTR]]
; CHECK-HISTORY-TLS: %[[D1:[^ ]*]] = ashr i64 %[[D]], 56
; CHECK-HISTORY-TLS: %[[D2:[^ ]*]] = shl nuw nsw i64 %[[D1]], 12
; CHECK-HISTORY-TLS: %[[D3:[^ ]*]] = xor i64 %[[D2]], -1
; CHECK-HISTORY-TLS: %[[D4:[^ ]*]] = add i64 %[[D]], 8
; CHECK-HISTORY-TLS: %[[D5:[^ ]*]] = and i64 %[[D4]], %[[D3]]
-; CHECK-HISTORY-TLS-SLOT: store i64 %[[D5]], i64* %[[C]]
-; CHECK-HISTORY-HWASAN-TLS: store i64 %[[D5]], i64* @__hwasan_tls
+; CHECK-HISTORY-TLS-SLOT: store i64 %[[D5]], ptr %[[B]]
+; CHECK-HISTORY-HWASAN-TLS: store i64 %[[D5]], ptr @__hwasan_tls
; CHECK-HISTORY-LIBCALL: call void @__hwasan_add_frame_record(i64 %[[MIX]])
; CHECK-TLS: %[[F:[^ ]*]] = or i64 %[[D]], 4294967295
@@ -97,7 +96,7 @@ define void @test_alloca() sanitize_hwaddress {
entry:
%x = alloca i32, align 4
- call void @use(i32* %x)
+ call void @use(ptr %x)
ret void
}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll b/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll
index a58463d6e1d7a..74cd9720d5f1d 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll
@@ -18,26 +18,24 @@ target triple = "aarch64-unknown-linux-android29"
define i32 @myCall_w2(i32 %in) sanitize_hwaddress {
entry:
- %a = alloca [17 x i8*], align 8
- %a2 = alloca [16 x i8*], align 8
- %b = bitcast [17 x i8*]* %a to i8*
- %b2 = bitcast [16 x i8*]* %a2 to i8*
- call void @llvm.lifetime.start.p0i8(i64 136, i8* %b)
- %t1 = call i32 @foo(i32 %in, i8* %b)
- %t2 = call i32 @foo(i32 %in, i8* %b)
- call void @llvm.lifetime.end.p0i8(i64 136, i8* %b)
- call void @llvm.lifetime.start.p0i8(i64 128, i8* %b2)
- %t3 = call i32 @foo(i32 %in, i8* %b2)
- %t4 = call i32 @foo(i32 %in, i8* %b2)
- call void @llvm.lifetime.end.p0i8(i64 128, i8* %b2)
+ %a = alloca [17 x ptr], align 8
+ %a2 = alloca [16 x ptr], align 8
+ call void @llvm.lifetime.start.p0(i64 136, ptr %a)
+ %t1 = call i32 @foo(i32 %in, ptr %a)
+ %t2 = call i32 @foo(i32 %in, ptr %a)
+ call void @llvm.lifetime.end.p0(i64 136, ptr %a)
+ call void @llvm.lifetime.start.p0(i64 128, ptr %a2)
+ %t3 = call i32 @foo(i32 %in, ptr %a2)
+ %t4 = call i32 @foo(i32 %in, ptr %a2)
+ call void @llvm.lifetime.end.p0(i64 128, ptr %a2)
%t5 = add i32 %t1, %t2
%t6 = add i32 %t3, %t4
%t7 = add i32 %t5, %t6
ret i32 %t7
}
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind
-declare i32 @foo(i32, i8*)
+declare i32 @foo(i32, ptr)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll b/llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
index 46d0b89b80b13..5f500d145af0a 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll
@@ -7,7 +7,7 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"
; Check a safe alloca to ensure it does not get a tag.
-define i32 @test_simple(i32* %a) sanitize_hwaddress {
+define i32 @test_simple(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_simple
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -17,14 +17,14 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca i8, align 4
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %buf.sroa.0)
- store volatile i8 0, i8* %buf.sroa.0, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %buf.sroa.0)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0)
+ store volatile i8 0, ptr %buf.sroa.0, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %buf.sroa.0)
ret i32 0
}
; Check a non-safe alloca to ensure it gets a tag.
-define i32 @test_use(i32* %a) sanitize_hwaddress {
+define i32 @test_use(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_use
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -34,15 +34,15 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca i8, align 4
- call void @use(i8* nonnull %buf.sroa.0)
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %buf.sroa.0)
- store volatile i8 0, i8* %buf.sroa.0, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %buf.sroa.0)
+ call void @use(ptr nonnull %buf.sroa.0)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0)
+ store volatile i8 0, ptr %buf.sroa.0, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %buf.sroa.0)
ret i32 0
}
; Check an alloca with in range GEP to ensure it does not get a tag or check.
-define i32 @test_in_range(i32* %a) sanitize_hwaddress {
+define i32 @test_in_range(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_in_range
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -52,15 +52,14 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 0
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %ptr)
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %ptr)
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %buf.sroa.0)
+ store volatile i8 0, ptr %buf.sroa.0, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %buf.sroa.0)
ret i32 0
}
; Check an alloca with in range GEP to ensure it does not get a tag or check.
-define i32 @test_in_range2(i32* %a) sanitize_hwaddress {
+define i32 @test_in_range2(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_in_range2
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -70,15 +69,14 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %x)
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %x)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %buf.sroa.0)
+ store volatile i8 0, ptr %ptr, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %buf.sroa.0)
ret i32 0
}
-define i32 @test_in_range3(i32* %a) sanitize_hwaddress {
+define i32 @test_in_range3(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_in_range3
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -88,13 +86,12 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_memset
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.memset.p0i8.i32(i8* %ptr, i8 0, i32 1, i1 true)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.memset.p0.i32(ptr %ptr, i8 0, i32 1, i1 true)
ret i32 0
}
-define i32 @test_in_range4(i32* %a) sanitize_hwaddress {
+define i32 @test_in_range4(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_in_range4
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -104,13 +101,12 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_memmove
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.memmove.p0i8.p0i8.i32(i8* %ptr, i8* %ptr, i32 1, i1 true)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.memmove.p0.p0.i32(ptr %ptr, ptr %ptr, i32 1, i1 true)
ret i32 0
}
-define i32 @test_in_range5(i32* %a) sanitize_hwaddress {
+define i32 @test_in_range5(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_in_range5
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -120,17 +116,15 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_memmove
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
%buf.sroa.1 = alloca [10 x i8], align 4
- %ptr1 = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %y = bitcast [10 x i8]* %buf.sroa.1 to i8*
- call void @llvm.memmove.p0i8.p0i8.i32(i8* %ptr, i8* %ptr1, i32 1, i1 true)
+ %ptr1 = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.memmove.p0.p0.i32(ptr %ptr, ptr %ptr1, i32 1, i1 true)
ret i32 0
}
; Check an alloca with out of range GEP to ensure it gets a tag and check.
-define i32 @test_out_of_range(i32* %a) sanitize_hwaddress {
+define i32 @test_out_of_range(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_out_of_range
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -140,15 +134,14 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 10
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %x)
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %x)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 10
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %buf.sroa.0)
+ store volatile i8 0, ptr %ptr, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %buf.sroa.0)
ret i32 0
}
-define i32 @test_out_of_range3(i32* %a) sanitize_hwaddress {
+define i32 @test_out_of_range3(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_out_of_range3
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -158,13 +151,12 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_memset
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.memset.p0i8.i32(i8* %ptr, i8 0, i32 2, i1 true)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.memset.p0.i32(ptr %ptr, i8 0, i32 2, i1 true)
ret i32 0
}
-define i32 @test_out_of_range4(i32* %a) sanitize_hwaddress {
+define i32 @test_out_of_range4(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_out_of_range4
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -174,13 +166,12 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_memmove
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.memmove.p0i8.p0i8.i32(i8* %ptr, i8* %ptr, i32 2, i1 true)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.memmove.p0.p0.i32(ptr %ptr, ptr %ptr, i32 2, i1 true)
ret i32 0
}
-define i32 @test_out_of_range5(i32* %a) sanitize_hwaddress {
+define i32 @test_out_of_range5(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_out_of_range5
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -190,22 +181,20 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_memmove
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
%buf.sroa.1 = alloca [10 x i8], align 4
- %ptr1 = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %y = bitcast [10 x i8]* %buf.sroa.1 to i8*
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %x)
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %x)
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %y)
- call void @llvm.memmove.p0i8.p0i8.i32(i8* %ptr, i8* %ptr1, i32 1, i1 true)
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %y)
+ %ptr1 = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %buf.sroa.0)
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %buf.sroa.0)
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %buf.sroa.1)
+ call void @llvm.memmove.p0.p0.i32(ptr %ptr, ptr %ptr1, i32 1, i1 true)
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %buf.sroa.1)
ret i32 0
}
; Check an alloca with potentially out of range GEP to ensure it gets a tag and
; check.
-define i32 @test_potentially_out_of_range(i32* %a) sanitize_hwaddress {
+define i32 @test_potentially_out_of_range(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_potentially_out_of_range
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -216,14 +205,14 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca [10 x i8], align 4
%off = call i32 @getoffset()
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 %off
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %ptr)
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %ptr)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 %off
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %ptr)
+ store volatile i8 0, ptr %ptr, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %ptr)
ret i32 0
}
-define i32 @test_potentially_out_of_range2(i8* %a) sanitize_hwaddress {
+define i32 @test_potentially_out_of_range2(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_potentially_out_of_range2
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -233,14 +222,13 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK: call {{.*}}__hwasan_memmove
%buf.sroa.0 = alloca [10 x i8], align 4
- %ptr = getelementptr [10 x i8], [10 x i8]* %buf.sroa.0, i32 0, i32 9
- %x = bitcast [10 x i8]* %buf.sroa.0 to i8*
- call void @llvm.memmove.p0i8.p0i8.i32(i8* %ptr, i8* %a, i32 1, i1 true)
+ %ptr = getelementptr [10 x i8], ptr %buf.sroa.0, i32 0, i32 9
+ call void @llvm.memmove.p0.p0.i32(ptr %ptr, ptr %a, i32 1, i1 true)
ret i32 0
}
; Check an alloca with potentially out of range GEP to ensure it gets a tag and
; check.
-define i32 @test_unclear(i32* %a) sanitize_hwaddress {
+define i32 @test_unclear(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_unclear
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -250,14 +238,14 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca i8, align 4
- %ptr = call i8* @getptr(i8* %buf.sroa.0)
- call void @llvm.lifetime.start.p0i8(i64 10, i8* nonnull %ptr)
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 10, i8* nonnull %ptr)
+ %ptr = call ptr @getptr(ptr %buf.sroa.0)
+ call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %ptr)
+ store volatile i8 0, ptr %ptr, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %ptr)
ret i32 0
}
-define i32 @test_select(i8* %a) sanitize_hwaddress {
+define i32 @test_select(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_select
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -266,18 +254,18 @@ entry:
; SAFETY: call {{.*}}__hwasan_store
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK: call {{.*}}__hwasan_store
- %x = call i8* @getptr(i8* %a)
+ %x = call ptr @getptr(ptr %a)
%buf.sroa.0 = alloca i8, align 4
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %buf.sroa.0)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0)
%c = call i1 @cond()
- %ptr = select i1 %c, i8* %x, i8* %buf.sroa.0
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %buf.sroa.0)
+ %ptr = select i1 %c, ptr %x, ptr %buf.sroa.0
+ store volatile i8 0, ptr %ptr, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %buf.sroa.0)
ret i32 0
}
; Check whether we see through the returns attribute of functions.
-define i32 @test_retptr(i32* %a) sanitize_hwaddress {
+define i32 @test_retptr(ptr %a) sanitize_hwaddress {
entry:
; CHECK-LABEL: @test_retptr
; NOSAFETY: call {{.*}}__hwasan_generate_tag
@@ -287,28 +275,28 @@ entry:
; NOSTACK-NOT: call {{.*}}__hwasan_generate_tag
; NOSTACK-NOT: call {{.*}}__hwasan_store
%buf.sroa.0 = alloca i8, align 4
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %buf.sroa.0)
- %ptr = call i8* @retptr(i8* %buf.sroa.0)
- store volatile i8 0, i8* %ptr, align 4, !tbaa !8
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %buf.sroa.0)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0)
+ %ptr = call ptr @retptr(ptr %buf.sroa.0)
+ store volatile i8 0, ptr %ptr, align 4, !tbaa !8
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %buf.sroa.0)
ret i32 0
}
; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
-declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1)
-declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
-declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1)
+declare void @llvm.memset.p0.i32(ptr, i8, i32, i1)
+declare void @llvm.memcpy.p0.p0.i32(ptr, ptr, i32, i1)
+declare void @llvm.memmove.p0.p0.i32(ptr, ptr, i32, i1)
declare i1 @cond()
-declare void @use(i8* nocapture)
+declare void @use(ptr nocapture)
declare i32 @getoffset()
-declare i8* @getptr(i8* nocapture)
-declare i8* @retptr(i8* returned)
+declare ptr @getptr(ptr nocapture)
+declare ptr @retptr(ptr returned)
!8 = !{!9, !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
index cf0b5baff5d21..d0f152d55d569 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
@@ -2,7 +2,7 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-android29"
- at stackbuf = dso_local local_unnamed_addr global i8* null, align 8
+ at stackbuf = dso_local local_unnamed_addr global ptr null, align 8
@jbuf = dso_local global [32 x i64] zeroinitializer, align 8
declare void @may_jump()
@@ -10,7 +10,7 @@ declare void @may_jump()
define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
entry:
%buf = alloca [4096 x i8], align 1
- %call = call i32 @setjmp(i64* noundef getelementptr inbounds ([32 x i64], [32 x i64]* @jbuf, i64 0, i64 0))
+ %call = call i32 @setjmp(ptr noundef @jbuf)
switch i32 %call, label %while.body [
i32 1, label %return
i32 2, label %sw.bb1
@@ -20,24 +20,23 @@ sw.bb1: ; preds = %entry
br label %return
while.body: ; preds = %entry
- %0 = getelementptr inbounds [4096 x i8], [4096 x i8]* %buf, i64 0, i64 0
- call void @llvm.lifetime.start.p0i8(i64 4096, i8* nonnull %0) #10
- store i8* %0, i8** @stackbuf, align 8
+ call void @llvm.lifetime.start.p0(i64 4096, ptr nonnull %buf) #10
+ store ptr %buf, ptr @stackbuf, align 8
; may_jump may call longjmp, going back to the switch (and then the return),
; bypassing the lifetime.end. This is why we need to untag on the return,
; rather than the lifetime.end.
call void @may_jump()
- call void @llvm.lifetime.end.p0i8(i64 4096, i8* nonnull %0) #10
+ call void @llvm.lifetime.end.p0(i64 4096, ptr nonnull %buf) #10
br label %return
; CHECK-LABEL: return:
-; CHECK: void @llvm.memset.p0i8.i64({{.*}}, i8 0, i64 256, i1 false)
+; CHECK: void @llvm.memset.p0.i64({{.*}}, i8 0, i64 256, i1 false)
return: ; preds = %entry, %while.body, %sw.bb1
%retval.0 = phi i1 [ true, %while.body ], [ true, %sw.bb1 ], [ false, %entry ]
ret i1 %retval.0
}
-declare i32 @setjmp(i64* noundef) returns_twice
+declare i32 @setjmp(ptr noundef) returns_twice
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
index 5d3fca5cdbdb1..e7681138cf722 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
@@ -24,245 +24,235 @@
define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress {
; X86-SCOPE-LABEL: @standard_lifetime(
-; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-SCOPE-NEXT: br label [[TMP8:%.*]]
-; X86-SCOPE: 8:
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP9]], i64 16)
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP8]]
-; X86-SCOPE: 11:
-; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
+; X86-SCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-SCOPE-NEXT: br label [[TMP7:%.*]]
+; X86-SCOPE: 7:
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP8]], i64 16)
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP7]]
+; X86-SCOPE: 10:
+; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @standard_lifetime(
-; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-NOSCOPE-NEXT: br label [[TMP9:%.*]]
-; X86-NOSCOPE: 9:
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP9]]
-; X86-NOSCOPE: 11:
-; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-NOSCOPE-NEXT: br label [[TMP8:%.*]]
+; X86-NOSCOPE: 8:
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP8]]
+; X86-NOSCOPE: 10:
+; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]]
-; AARCH64-SCOPE: 26:
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP29]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP30]], i8 [[TMP27]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP35:%.*]], label [[TMP26]]
-; AARCH64-SCOPE: 35:
-; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SCOPE-NEXT: br label [[TMP24:%.*]]
+; AARCH64-SCOPE: 24:
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
+; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP27]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP33:%.*]], label [[TMP24]]
+; AARCH64-SCOPE: 33:
+; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]]
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: br label [[TMP28:%.*]]
+; AARCH64-NOSCOPE: 28:
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP28]]
; AARCH64-NOSCOPE: 30:
-; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
-; AARCH64-NOSCOPE: 32:
-; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP34]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP35]], i8 0, i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP32]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP26:%.*]]
-; AARCH64-SHORT-SCOPE: 26:
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP29]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP30]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT: store i8 1, i8* [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP27]], i8* [[TMP32]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP35]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP36]], i8 0, i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP37:%.*]], label [[TMP26]]
-; AARCH64-SHORT-SCOPE: 37:
-; AARCH64-SHORT-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP24:%.*]]
+; AARCH64-SHORT-SCOPE: 24:
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP27]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP28]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP29]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP30]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP35:%.*]], label [[TMP24]]
+; AARCH64-SHORT-SCOPE: 35:
+; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP32:%.*]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP30:%.*]]
+; AARCH64-SHORT-NOSCOPE: 30:
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-SHORT-NOSCOPE: 32:
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
-; AARCH64-SHORT-NOSCOPE: 34:
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP36]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP37]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP34]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
@@ -270,258 +260,248 @@ define dso_local i32 @standard_lifetime() local_unnamed_addr sanitize_hwaddress
2: ; preds = %2, %0
; We should tag the memory after the br (in the loop).
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
%3 = tail call i1 (...) @cond() #2
; We should tag the memory before the next br (before the jump back).
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
br i1 %3, label %4, label %2
4: ; preds = %2
- call void @use(i8* nonnull %1) #2
+ call void @use(ptr nonnull %1) #2
ret i32 0
}
define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noinline sanitize_hwaddress {
; X86-SCOPE-LABEL: @standard_lifetime_optnone(
-; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-SCOPE-NEXT: br label [[TMP8:%.*]]
-; X86-SCOPE: 8:
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP9]], i64 16)
-; X86-SCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP8]]
-; X86-SCOPE: 11:
-; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
+; X86-SCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-SCOPE-NEXT: br label [[TMP7:%.*]]
+; X86-SCOPE: 7:
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP8]], i64 16)
+; X86-SCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP7]]
+; X86-SCOPE: 10:
+; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @standard_lifetime_optnone(
-; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-NOSCOPE-NEXT: br label [[TMP9:%.*]]
-; X86-NOSCOPE: 9:
-; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP10]], label [[TMP11:%.*]], label [[TMP9]]
-; X86-NOSCOPE: 11:
-; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-NOSCOPE-NEXT: br label [[TMP8:%.*]]
+; X86-NOSCOPE: 8:
+; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP8]]
+; X86-NOSCOPE: 10:
+; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]]
-; AARCH64-SCOPE: 26:
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP29]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP30]], i8 [[TMP27]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP35:%.*]], label [[TMP26]]
-; AARCH64-SCOPE: 35:
-; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SCOPE-NEXT: br label [[TMP24:%.*]]
+; AARCH64-SCOPE: 24:
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
+; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP27]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP25]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP33:%.*]], label [[TMP24]]
+; AARCH64-SCOPE: 33:
+; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]]
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: br label [[TMP28:%.*]]
+; AARCH64-NOSCOPE: 28:
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP28]]
; AARCH64-NOSCOPE: 30:
-; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
-; AARCH64-NOSCOPE: 32:
-; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP34]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP35]], i8 0, i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP32]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP26:%.*]]
-; AARCH64-SHORT-SCOPE: 26:
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP29]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP30]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT: store i8 1, i8* [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP27]], i8* [[TMP32]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP35]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP36]], i8 0, i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP37:%.*]], label [[TMP26]]
-; AARCH64-SHORT-SCOPE: 37:
-; AARCH64-SHORT-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP24:%.*]]
+; AARCH64-SHORT-SCOPE: 24:
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP27]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP28]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP29]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP30]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP35:%.*]], label [[TMP24]]
+; AARCH64-SHORT-SCOPE: 35:
+; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime_optnone(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP32:%.*]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP30:%.*]]
+; AARCH64-SHORT-NOSCOPE: 30:
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-SHORT-NOSCOPE: 32:
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
-; AARCH64-SHORT-NOSCOPE: 34:
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP36]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP37]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP34]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
@@ -529,508 +509,488 @@ define dso_local i32 @standard_lifetime_optnone() local_unnamed_addr optnone noi
2: ; preds = %2, %0
; We should tag the memory after the br (in the loop).
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
%3 = tail call i1 (...) @cond() #2
; We should tag the memory before the next br (before the jump back).
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
br i1 %3, label %4, label %2
4: ; preds = %2
- call void @use(i8* nonnull %1) #2
+ call void @use(ptr nonnull %1) #2
ret i32 0
}
define dso_local i32 @multiple_lifetimes() local_unnamed_addr sanitize_hwaddress {
; X86-SCOPE-LABEL: @multiple_lifetimes(
-; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-SCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @multiple_lifetimes(
-; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP31]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP32]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP31]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP32]], i8 0, i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
; We erase lifetime markers if we insert instrumentation outside of the
; lifetime.
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
- call void @use(i8* nonnull %1) #2
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
- call void @use(i8* nonnull %1) #2
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
+ call void @use(ptr nonnull %1) #2
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
+ call void @use(ptr nonnull %1) #2
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
ret i32 0
}
define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
; X86-SCOPE-LABEL: @unreachable_exit(
-; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]]
-; X86-SCOPE: 10:
-; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-SCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
+; X86-SCOPE: 9:
+; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-SCOPE-NEXT: ret i32 0
-; X86-SCOPE: 11:
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-SCOPE: 10:
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @unreachable_exit(
-; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]]
-; X86-NOSCOPE: 10:
-; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
+; X86-NOSCOPE: 9:
+; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
-; X86-NOSCOPE: 11:
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-NOSCOPE: 10:
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @unreachable_exit(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
-; AARCH64-SCOPE: 31:
-; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP33:%.*]]
+; AARCH64-SCOPE: 29:
+; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
-; AARCH64-SCOPE: 35:
-; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP37]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP38]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE: 33:
+; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
+; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 0, i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @unreachable_exit(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
-; AARCH64-NOSCOPE: 31:
-; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP33:%.*]]
+; AARCH64-NOSCOPE: 29:
+; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
-; AARCH64-NOSCOPE: 35:
-; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP37]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP38]], i8 0, i64 1, i1 false)
+; AARCH64-NOSCOPE: 33:
+; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP37:%.*]]
-; AARCH64-SHORT-SCOPE: 33:
-; AARCH64-SHORT-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP35]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP36]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
+; AARCH64-SHORT-SCOPE: 31:
+; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
-; AARCH64-SHORT-SCOPE: 37:
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP39]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP40]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE: 35:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP37:%.*]]
-; AARCH64-SHORT-NOSCOPE: 33:
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP35]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP36]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
+; AARCH64-SHORT-NOSCOPE: 31:
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
-; AARCH64-SHORT-NOSCOPE: 37:
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP39]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP40]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE: 35:
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
%2 = tail call i1 (...) @cond() #2
br i1 %2, label %3, label %4
3:
- call void @use(i8* nonnull %1) #2
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
+ call void @use(ptr nonnull %1) #2
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
ret i32 0
4:
@@ -1039,283 +999,273 @@ define dso_local i32 @unreachable_exit() local_unnamed_addr sanitize_hwaddress {
define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
; X86-SCOPE-LABEL: @diamond_lifetime(
-; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-SCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-SCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-SCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-SCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-SCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-SCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-SCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-SCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-SCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
-; X86-SCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]]
+; X86-SCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-SCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-SCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-SCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-SCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-SCOPE-NEXT: [[TMP8:%.*]] = tail call i1 (...) @cond()
+; X86-SCOPE-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
+; X86-SCOPE: 9:
+; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: br label [[TMP11:%.*]]
; X86-SCOPE: 10:
-; X86-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: br label [[TMP12:%.*]]
+; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
+; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP1]])
+; X86-SCOPE-NEXT: br label [[TMP11]]
; X86-SCOPE: 11:
-; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
-; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP2]])
-; X86-SCOPE-NEXT: br label [[TMP12]]
-; X86-SCOPE: 12:
; X86-SCOPE-NEXT: ret i32 0
;
; X86-NOSCOPE-LABEL: @diamond_lifetime(
-; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call i8* asm "", "=r,0"(i8* null)
+; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = alloca { i8, [15 x i8] }, align 16
-; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = bitcast { i8, [15 x i8] }* [[TMP1]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
-; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
-; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = ptrtoint i8* [[TMP2]] to i64
-; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
-; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
-; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to i8*
-; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 [[TMP8]], i64 16)
-; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = tail call i1 (...) @cond()
-; X86-NOSCOPE-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]]
+; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = call i8 @__hwasan_generate_tag()
+; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = zext i8 [[TMP2]] to i64
+; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 57
+; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]]
+; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr
+; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 [[TMP7]], i64 16)
+; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = tail call i1 (...) @cond()
+; X86-NOSCOPE-NEXT: br i1 [[TMP8]], label [[TMP9:%.*]], label [[TMP10:%.*]]
+; X86-NOSCOPE: 9:
+; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; X86-NOSCOPE-NEXT: br label [[TMP11:%.*]]
; X86-NOSCOPE: 10:
-; X86-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]]
+; X86-NOSCOPE-NEXT: br label [[TMP11]]
; X86-NOSCOPE: 11:
-; X86-NOSCOPE-NEXT: br label [[TMP12]]
-; X86-NOSCOPE: 12:
-; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(i8* [[TMP2]], i8 0, i64 16)
+; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP1]], i8 0, i64 16)
; X86-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SCOPE-LABEL: @diamond_lifetime(
-; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
-; AARCH64-SCOPE: 31:
-; AARCH64-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
-; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP33]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP34]], i8 0, i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: br label [[TMP39:%.*]]
-; AARCH64-SCOPE: 35:
-; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP37]]
-; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP38]], i8 0, i64 1, i1 false)
-; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SCOPE-NEXT: br label [[TMP39]]
-; AARCH64-SCOPE: 39:
+; AARCH64-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP33:%.*]]
+; AARCH64-SCOPE: 29:
+; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
+; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: br label [[TMP37:%.*]]
+; AARCH64-SCOPE: 33:
+; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
+; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
+; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 0, i64 1, i1 false)
+; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SCOPE-NEXT: br label [[TMP37]]
+; AARCH64-SCOPE: 37:
; AARCH64-SCOPE-NEXT: ret i32 0
;
; AARCH64-NOSCOPE-LABEL: @diamond_lifetime(
-; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP29]], i8 [[TMP26]], i64 1, i1 false)
-; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
-; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP32:%.*]]
+; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP24]], i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
+; AARCH64-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP30:%.*]]
+; AARCH64-NOSCOPE: 29:
+; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-NOSCOPE-NEXT: br label [[TMP31:%.*]]
+; AARCH64-NOSCOPE: 30:
+; AARCH64-NOSCOPE-NEXT: br label [[TMP31]]
; AARCH64-NOSCOPE: 31:
-; AARCH64-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-NOSCOPE-NEXT: br label [[TMP33:%.*]]
-; AARCH64-NOSCOPE: 32:
-; AARCH64-NOSCOPE-NEXT: br label [[TMP33]]
-; AARCH64-NOSCOPE: 33:
-; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP35]]
-; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP36]], i8 0, i64 1, i1 false)
+; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
+; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
+; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime(
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-SCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP37:%.*]]
-; AARCH64-SHORT-SCOPE: 33:
-; AARCH64-SHORT-SCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP35]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP36]], i8 0, i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP41:%.*]]
-; AARCH64-SHORT-SCOPE: 37:
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
-; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP39]]
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP40]], i8 0, i64 1, i1 false)
-; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull [[TMP20]])
-; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP41]]
-; AARCH64-SHORT-SCOPE: 41:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP35:%.*]]
+; AARCH64-SHORT-SCOPE: 31:
+; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP39:%.*]]
+; AARCH64-SHORT-SCOPE: 35:
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
+; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
+; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP39]]
+; AARCH64-SHORT-SCOPE: 39:
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
;
; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime(
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call i8* @llvm.thread.pointer()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, i8* [[TMP1]], i32 48
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = ashr i64 [[TMP4]], 3
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call i8* @llvm.frameaddress.p0i8(i32 0)
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint i8* [[TMP7]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP4]] to i64*
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], i64* [[TMP11]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP4]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP4]], 8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]]
-; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], i64* [[TMP3]], align 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP4]], 4294967295
-; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = alloca { i8, [15 x i8] }, align 16
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = bitcast { i8, [15 x i8] }* [[TMP19]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = call i8 @__hwasan_generate_tag()
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = zext i8 [[TMP21]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP22]], 56
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[TMP23]], [[TMP24]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to i8*
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP22]] to i8
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP28]]
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, i8* [[TMP29]], i32 0
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, i8* [[TMP30]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, i8* [[TMP20]], i32 15
-; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP26]], i8* [[TMP31]], align 1
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
-; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP34:%.*]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]]
+; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
+; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP20]], 56
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = or i64 [[TMP21]], [[TMP22]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP20]] to i8
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP27]], i32 0
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP28]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
+; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP24]], ptr [[TMP29]], align 1
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
+; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP32:%.*]]
+; AARCH64-SHORT-NOSCOPE: 31:
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
+; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP33:%.*]]
+; AARCH64-SHORT-NOSCOPE: 32:
+; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP33]]
; AARCH64-SHORT-NOSCOPE: 33:
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(i8* nonnull [[ALLOCA_0_HWASAN]])
-; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP35:%.*]]
-; AARCH64-SHORT-NOSCOPE: 34:
-; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP35]]
-; AARCH64-SHORT-NOSCOPE: 35:
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint i8* [[TMP20]] to i64
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
-; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, i8* [[TMP18]], i64 [[TMP37]]
-; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[TMP38]], i8 0, i64 1, i1 false)
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
+; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
+; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 0, i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
;
%1 = alloca i8, align 1
- call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
%2 = tail call i1 (...) @cond() #2
br i1 %2, label %3, label %4
3:
- call void @use(i8* nonnull %1) #2
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
+ call void @use(ptr nonnull %1) #2
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
br label %5
4:
- call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %1)
+ call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
br label %5
5:
@@ -1324,10 +1274,10 @@ define dso_local i32 @diamond_lifetime() local_unnamed_addr sanitize_hwaddress {
declare dso_local i1 @cond(...) local_unnamed_addr
-declare dso_local void @use(i8*) local_unnamed_addr
+declare dso_local void @use(ptr) local_unnamed_addr
; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/with-calls.ll
index ada2515081ea2..311c26342aebc 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/with-calls.ll
@@ -6,192 +6,192 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
-define i8 @test_load8(i8* %a) sanitize_hwaddress {
+define i8 @test_load8(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load8(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load1(i64 %[[A]])
; RECOVER: call void @__hwasan_load1_noabort(i64 %[[A]])
-; CHECK: %[[B:[^ ]*]] = load i8, i8* %a
+; CHECK: %[[B:[^ ]*]] = load i8, ptr %a
; CHECK: ret i8 %[[B]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i16 @test_load16(i16* %a) sanitize_hwaddress {
+define i16 @test_load16(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load16(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i16* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load2(i64 %[[A]])
; RECOVER: call void @__hwasan_load2_noabort(i64 %[[A]])
-; CHECK: %[[B:[^ ]*]] = load i16, i16* %a
+; CHECK: %[[B:[^ ]*]] = load i16, ptr %a
; CHECK: ret i16 %[[B]]
entry:
- %b = load i16, i16* %a, align 4
+ %b = load i16, ptr %a, align 4
ret i16 %b
}
-define i32 @test_load32(i32* %a) sanitize_hwaddress {
+define i32 @test_load32(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load32(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i32* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load4(i64 %[[A]])
; RECOVER: call void @__hwasan_load4_noabort(i64 %[[A]])
-; CHECK: %[[B:[^ ]*]] = load i32, i32* %a
+; CHECK: %[[B:[^ ]*]] = load i32, ptr %a
; CHECK: ret i32 %[[B]]
entry:
- %b = load i32, i32* %a, align 4
+ %b = load i32, ptr %a, align 4
ret i32 %b
}
-define i64 @test_load64(i64* %a) sanitize_hwaddress {
+define i64 @test_load64(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load64(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load8(i64 %[[A]])
; RECOVER: call void @__hwasan_load8_noabort(i64 %[[A]])
-; CHECK: %[[B:[^ ]*]] = load i64, i64* %a
+; CHECK: %[[B:[^ ]*]] = load i64, ptr %a
; CHECK: ret i64 %[[B]]
entry:
- %b = load i64, i64* %a, align 8
+ %b = load i64, ptr %a, align 8
ret i64 %b
}
-define i128 @test_load128(i128* %a) sanitize_hwaddress {
+define i128 @test_load128(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load128(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i128* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_load16(i64 %[[A]])
; RECOVER: call void @__hwasan_load16_noabort(i64 %[[A]])
-; CHECK: %[[B:[^ ]*]] = load i128, i128* %a
+; CHECK: %[[B:[^ ]*]] = load i128, ptr %a
; CHECK: ret i128 %[[B]]
entry:
- %b = load i128, i128* %a, align 16
+ %b = load i128, ptr %a, align 16
ret i128 %b
}
-define i40 @test_load40(i40* %a) sanitize_hwaddress {
+define i40 @test_load40(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_loadN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_loadN_noabort(i64 %[[A]], i64 5)
-; CHECK: %[[B:[^ ]*]] = load i40, i40* %a
+; CHECK: %[[B:[^ ]*]] = load i40, ptr %a
; CHECK: ret i40 %[[B]]
entry:
- %b = load i40, i40* %a, align 4
+ %b = load i40, ptr %a, align 4
ret i40 %b
}
-define void @test_store8(i8* %a, i8 %b) sanitize_hwaddress {
+define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store8(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i8* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store1(i64 %[[A]])
; RECOVER: call void @__hwasan_store1_noabort(i64 %[[A]])
-; CHECK: store i8 %b, i8* %a
+; CHECK: store i8 %b, ptr %a
; CHECK: ret void
entry:
- store i8 %b, i8* %a, align 4
+ store i8 %b, ptr %a, align 4
ret void
}
-define void @test_store16(i16* %a, i16 %b) sanitize_hwaddress {
+define void @test_store16(ptr %a, i16 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store16(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i16* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store2(i64 %[[A]])
; RECOVER: call void @__hwasan_store2_noabort(i64 %[[A]])
-; CHECK: store i16 %b, i16* %a
+; CHECK: store i16 %b, ptr %a
; CHECK: ret void
entry:
- store i16 %b, i16* %a, align 4
+ store i16 %b, ptr %a, align 4
ret void
}
-define void @test_store32(i32* %a, i32 %b) sanitize_hwaddress {
+define void @test_store32(ptr %a, i32 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store32(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i32* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store4(i64 %[[A]])
; RECOVER: call void @__hwasan_store4_noabort(i64 %[[A]])
-; CHECK: store i32 %b, i32* %a
+; CHECK: store i32 %b, ptr %a
; CHECK: ret void
entry:
- store i32 %b, i32* %a, align 4
+ store i32 %b, ptr %a, align 4
ret void
}
-define void @test_store64(i64* %a, i64 %b) sanitize_hwaddress {
+define void @test_store64(ptr %a, i64 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store64(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i64* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store8(i64 %[[A]])
; RECOVER: call void @__hwasan_store8_noabort(i64 %[[A]])
-; CHECK: store i64 %b, i64* %a
+; CHECK: store i64 %b, ptr %a
; CHECK: ret void
entry:
- store i64 %b, i64* %a, align 8
+ store i64 %b, ptr %a, align 8
ret void
}
-define void @test_store128(i128* %a, i128 %b) sanitize_hwaddress {
+define void @test_store128(ptr %a, i128 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store128(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i128* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_store16(i64 %[[A]])
; RECOVER: call void @__hwasan_store16_noabort(i64 %[[A]])
-; CHECK: store i128 %b, i128* %a
+; CHECK: store i128 %b, ptr %a
; CHECK: ret void
entry:
- store i128 %b, i128* %a, align 16
+ store i128 %b, ptr %a, align 16
ret void
}
-define void @test_store40(i40* %a, i40 %b) sanitize_hwaddress {
+define void @test_store40(ptr %a, i40 %b) sanitize_hwaddress {
; CHECK-LABEL: @test_store40(
-; CHECK: %[[A:[^ ]*]] = ptrtoint i40* %a to i64
+; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %a to i64
; ABORT: call void @__hwasan_storeN(i64 %[[A]], i64 5)
; RECOVER: call void @__hwasan_storeN_noabort(i64 %[[A]], i64 5)
-; CHECK: store i40 %b, i40* %a
+; CHECK: store i40 %b, ptr %a
; CHECK: ret void
entry:
- store i40 %b, i40* %a, align 4
+ store i40 %b, ptr %a, align 4
ret void
}
-define i8 @test_load_noattr(i8* %a) {
+define i8 @test_load_noattr(ptr %a) {
; CHECK-LABEL: @test_load_noattr(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %[[B:[^ ]*]] = load i8, i8* %a
+; CHECK-NEXT: %[[B:[^ ]*]] = load i8, ptr %a
; CHECK-NEXT: ret i8 %[[B]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i8 @test_load_notmyattr(i8* %a) sanitize_address {
+define i8 @test_load_notmyattr(ptr %a) sanitize_address {
; CHECK-LABEL: @test_load_notmyattr(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %[[B:[^ ]*]] = load i8, i8* %a
+; CHECK-NEXT: %[[B:[^ ]*]] = load i8, ptr %a
; CHECK-NEXT: ret i8 %[[B]]
entry:
- %b = load i8, i8* %a, align 4
+ %b = load i8, ptr %a, align 4
ret i8 %b
}
-define i8 @test_load_addrspace(i8 addrspace(256)* %a) sanitize_hwaddress {
+define i8 @test_load_addrspace(ptr addrspace(256) %a) sanitize_hwaddress {
; CHECK-LABEL: @test_load_addrspace(
; CHECK-NEXT: entry:
-; CHECK-NEXT: %[[B:[^ ]*]] = load i8, i8 addrspace(256)* %a
+; CHECK-NEXT: %[[B:[^ ]*]] = load i8, ptr addrspace(256) %a
; CHECK-NEXT: ret i8 %[[B]]
entry:
- %b = load i8, i8 addrspace(256)* %a, align 4
+ %b = load i8, ptr addrspace(256) %a, align 4
ret i8 %b
}
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