[PATCH] D138177: [LoongArch] Add codegen support for atomicrmw min/max operation on LA64

[Gong LingQin via Phabricator via llvm-commits]

gonglingqin added inline comments.


================
Comment at: llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp:2281-2282
+        DL.getTypeStoreSizeInBits(AI->getValOperand()->getType());
+    Value *SextShamt =
+        Builder.CreateSub(Builder.getIntN(GRLen, GRLen - ValWidth), ShiftAmt);
+    Result = Builder.CreateCall(LlwOpScwLoop,
----------------
xen0n wrote:
> This may have room for improvement:
> 
> Firstly, this value is statically known at compile-time, so it should probably be an immediate. I looked at the surrounding code and found out some similar expressions like this one, so you may choose to refactor later.
> 
> Secondly, we have `ext.w.b` and `ext.w.h` that is usable even in LA32 mode, so it may be very worthwhile to special-case these two sizes so that the sign extension can be done in one insn/cycle.
Thanks for your advice! I will improve the relevant implementation in the later patch.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D138177/new/

https://reviews.llvm.org/D138177