[PATCH] D138542: [InstSimplify] Use dominate condtion to simplify instructions

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 updated this revision to Diff 478035.
bcl5980 added a comment.

Add recursive count for divrem.
And/Or are also added into simplifyByDomEq.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138542/new/

https://reviews.llvm.org/D138542

Files:
  llvm/lib/Analysis/InstructionSimplify.cpp
  llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll
  llvm/test/Transforms/InstSimplify/domcondition.ll

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