[llvm] 7f06a58 - [Hexagon] Put asserts in an !NDEBUG region. NFCI
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 25 02:02:33 PST 2022
Author: Benjamin Kramer
Date: 2022-11-25T11:02:16+01:00
New Revision: 7f06a5824cdb297a19b7c82bb191c22539f34070
URL: https://github.com/llvm/llvm-project/commit/7f06a5824cdb297a19b7c82bb191c22539f34070
DIFF: https://github.com/llvm/llvm-project/commit/7f06a5824cdb297a19b7c82bb191c22539f34070.diff
LOG: [Hexagon] Put asserts in an !NDEBUG region. NFCI
Avoids unused variables in NDEBUG builds.
Added:
Modified:
llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
index 0c7419fef9549..69919267aa7a5 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
@@ -2285,13 +2285,15 @@ SDValue HvxSelector::getVectorConstant(ArrayRef<uint8_t> Data,
void HvxSelector::selectExtractSubvector(SDNode *N) {
SDValue Inp = N->getOperand(0);
MVT ResTy = N->getValueType(0).getSimpleVT();
+ auto IdxN = cast<ConstantSDNode>(N->getOperand(1));
+ unsigned Idx = IdxN->getZExtValue();
+#ifndef NDEBUG
MVT InpTy = Inp.getValueType().getSimpleVT();
assert(InpTy.getVectorElementType() == ResTy.getVectorElementType());
unsigned ResLen = ResTy.getVectorNumElements();
assert(2 * ResLen == InpTy.getVectorNumElements());
- auto IdxN = cast<ConstantSDNode>(N->getOperand(1));
- unsigned Idx = IdxN->getZExtValue();
assert(Idx == 0 || Idx == ResLen);
+#endif
unsigned SubReg = Idx == 0 ? Hexagon::vsub_lo : Hexagon::vsub_hi;
SDValue Ext = DAG.getTargetExtractSubreg(SubReg, SDLoc(N), ResTy, Inp);
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