[PATCH] D138639: [X86] Add In64BitMode for MOVSX64/MOVZX64 instructions

[Kan Shengchen via Phabricator via llvm-commits]

skan added a comment.

In D138639#3950133 <https://reviews.llvm.org/D138639#3950133>, @HaohaiWen wrote:

>> Is it not possible to use the encoding information in TSFlags rather than going through the assembly parser? Your patches for schedtool seem very coupled to the names of operand classes and other things. It looks like it will require updates often.
>
> The asm enumeration code and asm matcher patch as well as xed patch are used to build map between llvm opcode <-> Xed info <-> uops.info data / other scheduling info data source. Do you have any suggestion to build this map?
> IsaSet in Xed info can also be used to identify whether a llvm opcode is supported by specific target. LLVM predicates can't determine that precisely.
>
> Apart from that, I think we'd better fix wrong predicates.

I think Craig means you can use the REX_W bit in TSFlags to assist you in Predicate check, e.g  `Condition = In64BitMode || HasREX_W`.


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https://reviews.llvm.org/D138639