[PATCH] D138563: [IntrisicEmitter] Allow intrinsic types to be dependent on the data layout

Alexander Richardson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 24 10:11:48 PST 2022


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try to fix mlir build


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fix style


arichardson added a comment.

update


For certain intrinsics (e.g. stack/code related ones), the address space
always has to be the alloca address space defined in the DataLayout and
there will not be another version of that intrinsic using other address
spaces in the same module.
This change adds new llvm_{prog,alloca,global}_ptr_ty to Intrinsics.td.
It only adds the infrastructure, follow-up commits will use it for e.g.
va_start,va_copy,va_end,returnaddress, etc.

The motivating use case here are the downstream CHERI targets
that use address space 200 for alloca/program/globals. So far CHERI LLVM
overloaded all those intrinsics but this caused a lot of downstream merge
conflicts in test files, so this approach may be more maintainable.

The alternative would be to overload all the remaining intrinsics but that
causes a lot of test churn (especially for llvm.va_*/llvm.stack{save,restore}*)
and should not be necessary since those intrinsics don't really need to
be overloaded, the types just happen to depend on the data layout string.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138563

Files:
  llvm/include/llvm-c/Core.h
  llvm/include/llvm/IR/Intrinsics.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/lib/IR/Core.cpp
  llvm/lib/IR/Function.cpp
  llvm/lib/IR/IRBuilder.cpp
  llvm/lib/IR/Verifier.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
  llvm/utils/TableGen/IntrinsicEmitter.cpp
  mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp

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