[llvm] ca78b56 - [SelectOpt] Don't treat LogicalAnd/LogicalOr as selects

David Green via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 24 06:30:06 PST 2022


Author: David Green
Date: 2022-11-24T14:29:57Z
New Revision: ca78b5601466f8515f5f958ef8e63d787d9d812e

URL: https://github.com/llvm/llvm-project/commit/ca78b5601466f8515f5f958ef8e63d787d9d812e
DIFF: https://github.com/llvm/llvm-project/commit/ca78b5601466f8515f5f958ef8e63d787d9d812e.diff

LOG: [SelectOpt] Don't treat LogicalAnd/LogicalOr as selects

A `select i1 %c, i1 true, i1 %d` is just an or and a `select i1 %c, i1 %d, i1 false`
is just an and. There are better treated as such in the logic of SelectOpt, allowing
the backend to optimize them to and/or directly.

Differential Revision: https://reviews.llvm.org/D138490

Added: 
    llvm/test/CodeGen/AArch64/selectopt-logical.ll

Modified: 
    llvm/lib/CodeGen/SelectOptimize.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectOptimize.cpp b/llvm/lib/CodeGen/SelectOptimize.cpp
index b5a8a80193adb..a8144e40f3431 100644
--- a/llvm/lib/CodeGen/SelectOptimize.cpp
+++ b/llvm/lib/CodeGen/SelectOptimize.cpp
@@ -515,12 +515,27 @@ void SelectOptimize::convertProfitableSIGroups(SelectGroups &ProfSIGroups) {
   }
 }
 
+static bool isSpecialSelect(SelectInst *SI) {
+  using namespace llvm::PatternMatch;
+
+  // If the select is a logical-and/logical-or then it is better treated as a
+  // and/or by the backend.
+  if (match(SI, m_CombineOr(m_LogicalAnd(m_Value(), m_Value()),
+                            m_LogicalOr(m_Value(), m_Value()))))
+    return true;
+
+  return false;
+}
+
 void SelectOptimize::collectSelectGroups(BasicBlock &BB,
                                          SelectGroups &SIGroups) {
   BasicBlock::iterator BBIt = BB.begin();
   while (BBIt != BB.end()) {
     Instruction *I = &*BBIt++;
     if (SelectInst *SI = dyn_cast<SelectInst>(I)) {
+      if (isSpecialSelect(SI))
+        continue;
+
       SelectGroup SIGroup;
       SIGroup.push_back(SI);
       while (BBIt != BB.end()) {

diff  --git a/llvm/test/CodeGen/AArch64/selectopt-logical.ll b/llvm/test/CodeGen/AArch64/selectopt-logical.ll
new file mode 100644
index 0000000000000..635922e272c4f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/selectopt-logical.ll
@@ -0,0 +1,117 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=neoverse-v2 -S < %s | FileCheck %s
+
+define i32 @test(ptr nocapture noundef readnone %x, i32 noundef %iters) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp sgt i32 [[ITERS:%.*]], 0
+; CHECK-NEXT:    br i1 [[CMP3]], label [[FOR_BODY_I_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK:       for.body.i.preheader:
+; CHECK-NEXT:    [[I_05:%.*]] = phi i32 [ [[INC:%.*]], [[INNER_LOOP_010_EXIT:%.*]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[RES_04:%.*]] = phi i32 [ [[OR:%.*]], [[INNER_LOOP_010_EXIT]] ], [ 0, [[ENTRY]] ]
+; CHECK-NEXT:    br label [[FOR_BODY_I:%.*]]
+; CHECK:       for.cond.cleanup:
+; CHECK-NEXT:    [[RES_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[OR]], [[INNER_LOOP_010_EXIT]] ]
+; CHECK-NEXT:    ret i32 [[RES_0_LCSSA]]
+; CHECK:       for.body.i:
+; CHECK-NEXT:    [[INDVARS_IV_I:%.*]] = phi i64 [ 0, [[FOR_BODY_I_PREHEADER]] ], [ [[INDVARS_IV_NEXT_I_4:%.*]], [[FOR_BODY_I]] ]
+; CHECK-NEXT:    [[ALL_0_OFF010_I:%.*]] = phi i1 [ true, [[FOR_BODY_I_PREHEADER]] ], [ [[ALL_0_OFF0__I_4:%.*]], [[FOR_BODY_I]] ]
+; CHECK-NEXT:    [[ANY_0_OFF09_I:%.*]] = phi i1 [ false, [[FOR_BODY_I_PREHEADER]] ], [ [[DOTANY_0_OFF0_I_4:%.*]], [[FOR_BODY_I]] ]
+; CHECK-NEXT:    [[ARRAYIDX_I:%.*]] = getelementptr inbounds float, ptr [[X:%.*]], i64 [[INDVARS_IV_I]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load float, ptr [[ARRAYIDX_I]], align 4
+; CHECK-NEXT:    [[CMP1_I:%.*]] = fcmp fast olt float [[TMP0]], 0.000000e+00
+; CHECK-NEXT:    [[INDVARS_IV_NEXT_I:%.*]] = add nuw nsw i64 [[INDVARS_IV_I]], 1
+; CHECK-NEXT:    [[ARRAYIDX_I_1:%.*]] = getelementptr inbounds float, ptr [[X]], i64 [[INDVARS_IV_NEXT_I]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load float, ptr [[ARRAYIDX_I_1]], align 4
+; CHECK-NEXT:    [[CMP1_I_1:%.*]] = fcmp fast olt float [[TMP1]], 0.000000e+00
+; CHECK-NEXT:    [[INDVARS_IV_NEXT_I_1:%.*]] = add nuw nsw i64 [[INDVARS_IV_I]], 2
+; CHECK-NEXT:    [[ARRAYIDX_I_2:%.*]] = getelementptr inbounds float, ptr [[X]], i64 [[INDVARS_IV_NEXT_I_1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = load float, ptr [[ARRAYIDX_I_2]], align 4
+; CHECK-NEXT:    [[CMP1_I_2:%.*]] = fcmp fast olt float [[TMP2]], 0.000000e+00
+; CHECK-NEXT:    [[INDVARS_IV_NEXT_I_2:%.*]] = add nuw nsw i64 [[INDVARS_IV_I]], 3
+; CHECK-NEXT:    [[ARRAYIDX_I_3:%.*]] = getelementptr inbounds float, ptr [[X]], i64 [[INDVARS_IV_NEXT_I_2]]
+; CHECK-NEXT:    [[TMP3:%.*]] = load float, ptr [[ARRAYIDX_I_3]], align 4
+; CHECK-NEXT:    [[CMP1_I_3:%.*]] = fcmp fast olt float [[TMP3]], 0.000000e+00
+; CHECK-NEXT:    [[INDVARS_IV_NEXT_I_3:%.*]] = add nuw nsw i64 [[INDVARS_IV_I]], 4
+; CHECK-NEXT:    [[ARRAYIDX_I_4:%.*]] = getelementptr inbounds float, ptr [[X]], i64 [[INDVARS_IV_NEXT_I_3]]
+; CHECK-NEXT:    [[TMP4:%.*]] = load float, ptr [[ARRAYIDX_I_4]], align 4
+; CHECK-NEXT:    [[CMP1_I_4:%.*]] = fcmp fast olt float [[TMP4]], 0.000000e+00
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[CMP1_I_4]], i1 true, i1 [[CMP1_I_3]]
+; CHECK-NEXT:    [[TMP6:%.*]] = select i1 [[TMP5]], i1 true, i1 [[CMP1_I_2]]
+; CHECK-NEXT:    [[TMP7:%.*]] = select i1 [[TMP6]], i1 true, i1 [[CMP1_I_1]]
+; CHECK-NEXT:    [[TMP8:%.*]] = select i1 [[TMP7]], i1 true, i1 [[CMP1_I]]
+; CHECK-NEXT:    [[DOTANY_0_OFF0_I_4]] = select i1 [[TMP8]], i1 true, i1 [[ANY_0_OFF09_I]]
+; CHECK-NEXT:    [[TMP9:%.*]] = select i1 [[CMP1_I_4]], i1 [[CMP1_I_3]], i1 false
+; CHECK-NEXT:    [[TMP10:%.*]] = select i1 [[TMP9]], i1 [[CMP1_I_2]], i1 false
+; CHECK-NEXT:    [[TMP11:%.*]] = select i1 [[TMP10]], i1 [[CMP1_I_1]], i1 false
+; CHECK-NEXT:    [[TMP12:%.*]] = select i1 [[TMP11]], i1 [[CMP1_I]], i1 false
+; CHECK-NEXT:    [[ALL_0_OFF0__I_4]] = select i1 [[TMP12]], i1 [[ALL_0_OFF010_I]], i1 false
+; CHECK-NEXT:    [[INDVARS_IV_NEXT_I_4]] = add nuw nsw i64 [[INDVARS_IV_I]], 5
+; CHECK-NEXT:    [[EXITCOND_NOT_I_4:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_I_4]], 10000
+; CHECK-NEXT:    br i1 [[EXITCOND_NOT_I_4]], label [[INNER_LOOP_010_EXIT]], label [[FOR_BODY_I]]
+; CHECK:       inner_loop_010.exit:
+; CHECK-NEXT:    [[TMP13:%.*]] = select i1 [[DOTANY_0_OFF0_I_4]], i32 2, i32 3
+; CHECK-NEXT:    [[TMP14:%.*]] = select i1 [[ALL_0_OFF0__I_4]], i32 1, i32 [[TMP13]]
+; CHECK-NEXT:    [[OR]] = or i32 [[TMP14]], [[RES_04]]
+; CHECK-NEXT:    [[INC]] = add nuw nsw i32 [[I_05]], 1
+; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC]], [[ITERS]]
+; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_I_PREHEADER]]
+;
+entry:
+  %cmp3 = icmp sgt i32 %iters, 0
+  br i1 %cmp3, label %for.body.i.preheader, label %for.cond.cleanup
+
+for.body.i.preheader:                             ; preds = %entry, %inner_loop_010.exit
+  %i.05 = phi i32 [ %inc, %inner_loop_010.exit ], [ 0, %entry ]
+  %res.04 = phi i32 [ %or, %inner_loop_010.exit ], [ 0, %entry ]
+  br label %for.body.i
+
+for.cond.cleanup:                                 ; preds = %inner_loop_010.exit, %entry
+  %res.0.lcssa = phi i32 [ 0, %entry ], [ %or, %inner_loop_010.exit ]
+  ret i32 %res.0.lcssa
+
+for.body.i:                                       ; preds = %for.body.i, %for.body.i.preheader
+  %indvars.iv.i = phi i64 [ 0, %for.body.i.preheader ], [ %indvars.iv.next.i.4, %for.body.i ]
+  %all.0.off010.i = phi i1 [ true, %for.body.i.preheader ], [ %all.0.off0..i.4, %for.body.i ]
+  %any.0.off09.i = phi i1 [ false, %for.body.i.preheader ], [ %.any.0.off0.i.4, %for.body.i ]
+  %arrayidx.i = getelementptr inbounds float, ptr %x, i64 %indvars.iv.i
+  %0 = load float, ptr %arrayidx.i, align 4
+  %cmp1.i = fcmp fast olt float %0, 0.000000e+00
+  %indvars.iv.next.i = add nuw nsw i64 %indvars.iv.i, 1
+  %arrayidx.i.1 = getelementptr inbounds float, ptr %x, i64 %indvars.iv.next.i
+  %1 = load float, ptr %arrayidx.i.1, align 4
+  %cmp1.i.1 = fcmp fast olt float %1, 0.000000e+00
+  %indvars.iv.next.i.1 = add nuw nsw i64 %indvars.iv.i, 2
+  %arrayidx.i.2 = getelementptr inbounds float, ptr %x, i64 %indvars.iv.next.i.1
+  %2 = load float, ptr %arrayidx.i.2, align 4
+  %cmp1.i.2 = fcmp fast olt float %2, 0.000000e+00
+  %indvars.iv.next.i.2 = add nuw nsw i64 %indvars.iv.i, 3
+  %arrayidx.i.3 = getelementptr inbounds float, ptr %x, i64 %indvars.iv.next.i.2
+  %3 = load float, ptr %arrayidx.i.3, align 4
+  %cmp1.i.3 = fcmp fast olt float %3, 0.000000e+00
+  %indvars.iv.next.i.3 = add nuw nsw i64 %indvars.iv.i, 4
+  %arrayidx.i.4 = getelementptr inbounds float, ptr %x, i64 %indvars.iv.next.i.3
+  %4 = load float, ptr %arrayidx.i.4, align 4
+  %cmp1.i.4 = fcmp fast olt float %4, 0.000000e+00
+  %5 = select i1 %cmp1.i.4, i1 true, i1 %cmp1.i.3
+  %6 = select i1 %5, i1 true, i1 %cmp1.i.2
+  %7 = select i1 %6, i1 true, i1 %cmp1.i.1
+  %8 = select i1 %7, i1 true, i1 %cmp1.i
+  %.any.0.off0.i.4 = select i1 %8, i1 true, i1 %any.0.off09.i
+  %9 = select i1 %cmp1.i.4, i1 %cmp1.i.3, i1 false
+  %10 = select i1 %9, i1 %cmp1.i.2, i1 false
+  %11 = select i1 %10, i1 %cmp1.i.1, i1 false
+  %12 = select i1 %11, i1 %cmp1.i, i1 false
+  %all.0.off0..i.4 = select i1 %12, i1 %all.0.off010.i, i1 false
+  %indvars.iv.next.i.4 = add nuw nsw i64 %indvars.iv.i, 5
+  %exitcond.not.i.4 = icmp eq i64 %indvars.iv.next.i.4, 10000
+  br i1 %exitcond.not.i.4, label %inner_loop_010.exit, label %for.body.i
+
+inner_loop_010.exit:                              ; preds = %for.body.i
+  %13 = select i1 %.any.0.off0.i.4, i32 2, i32 3
+  %14 = select i1 %all.0.off0..i.4, i32 1, i32 %13
+  %or = or i32 %14, %res.04
+  %inc = add nuw nsw i32 %i.05, 1
+  %exitcond.not = icmp eq i32 %inc, %iters
+  br i1 %exitcond.not, label %for.cond.cleanup, label %for.body.i.preheader
+}


        


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