[PATCH] D136335: [Assignment Tracking Analysis][5/*] Tests

[Orlando Cazalet-Hyams via Phabricator via llvm-commits]

Orlando added a comment.

(just responding to one inline comment to try to clear up my confusing comments)



================
Comment at: llvm/test/DebugInfo/assignment-tracking/X86/untagged-store-frag.ll:4-5
+
+;; Hand-written to test untagged store handling on a simple case. Here's what
+;; we're looking at in the IR:
+
----------------
jmorse wrote:
> From a standing start, I don't know what mem(a) and dbg(a) represent -- presumably the in-memory-or-in-value result computed by assignment tracing? But then the comment on 2. conflicts with that? 
`1. mem(a): bits [0,  64) = !14` represents a store to the memory location of `a` (bits `[0, 64)`) with a `!DIAssignID !14` attachment .
`2. dbg(a): bits [0,  64) = !14` represents a for the same var/bits using `!DIAssignID !14`

The end-of-line comment indicates what the analysis is working out. The analysis sees that at (/just after) position `2` the (conceptual/source) variable and the variable's memory location are both dominated by the assignment `!14` at this point, so we can use the memory location. Does that help at all?


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