[PATCH] D138579: [AArch64] Assembly support for FEAT_LRCPC3

[Sam Elliott via Phabricator via llvm-commits]

lenary added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:8572
+  def STLR_x_64 : BaseLRCPC3IntegerLoadStore<0b11, 0b10, (outs GPR64sp:$Rn_wb)           , (ins GPR64:$Rt, GPR64sp:$Rn), "stlr" , "\t$Rt, [$Rn, #-8]!", "$Rn = $Rn_wb">; /* PUSH register */
+  def LDAPR_w_32: BaseLRCPC3IntegerLoadStore<0b10, 0b11, (outs GPR32:$Rt, GPR64sp:$Rn_wb), (ins GPR64sp:$Rn)           , "ldapr", "\t$Rt, [$Rn], #4"  , "$Rn = $Rn_wb">; /* POP register */
+  def LDAPR_x_64: BaseLRCPC3IntegerLoadStore<0b11, 0b11, (outs GPR64:$Rt, GPR64sp:$Rn_wb), (ins GPR64sp:$Rn)           , "ldapr", "\t$Rt, [$Rn], #8"  , "$Rn = $Rn_wb">; /* POP register */
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Additional comment: can you change the order of `(outs` here, as most writeback instructions seem to make their writeback register the first of the outs. A good example is `LDRXpost` in the fully-expanded tablegen.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138579/new/

https://reviews.llvm.org/D138579