[PATCH] D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation
Anton Sidorenko via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 24 04:47:44 PST 2022
asi-sc created this revision.
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This patch add reassociation of FADD/FSUB instruction pairs.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D138660
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.h
llvm/test/CodeGen/RISCV/machine-combiner.ll
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