[llvm] 409f0dc - [Alignment][NFC] Use the Align type in MCSection
Guillaume Chatelet via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 24 04:33:13 PST 2022
Author: Guillaume Chatelet
Date: 2022-11-24T12:32:58Z
New Revision: 409f0dc4a420db1c6b259d5ae965a070c169d930
URL: https://github.com/llvm/llvm-project/commit/409f0dc4a420db1c6b259d5ae965a070c169d930
DIFF: https://github.com/llvm/llvm-project/commit/409f0dc4a420db1c6b259d5ae965a070c169d930.diff
LOG: [Alignment][NFC] Use the Align type in MCSection
Differential Revision: https://reviews.llvm.org/D138653
Added:
Modified:
llvm/include/llvm/MC/MCSection.h
llvm/lib/MC/ELFObjectWriter.cpp
llvm/lib/MC/MCELFStreamer.cpp
llvm/lib/MC/MCObjectStreamer.cpp
llvm/lib/MC/MCSectionXCOFF.cpp
llvm/lib/MC/MCWinCOFFStreamer.cpp
llvm/lib/MC/MachObjectWriter.cpp
llvm/lib/MC/WasmObjectWriter.cpp
llvm/lib/MC/WinCOFFObjectWriter.cpp
llvm/lib/MC/XCOFFObjectWriter.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
llvm/tools/dsymutil/MachOUtils.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCSection.h b/llvm/include/llvm/MC/MCSection.h
index 2f7e17123c19d..5382d845d405f 100644
--- a/llvm/include/llvm/MC/MCSection.h
+++ b/llvm/include/llvm/MC/MCSection.h
@@ -137,7 +137,7 @@ class MCSection {
MCSymbol *getEndSymbol(MCContext &Ctx);
bool hasEnded() const;
- unsigned getAlignment() const { return Alignment.value(); }
+ Align getAlign() const { return Alignment; }
void setAlignment(Align Value) { Alignment = Value; }
unsigned getOrdinal() const { return Ordinal; }
diff --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
index 945b82c8eaabb..3dc0599236875 100644
--- a/llvm/lib/MC/ELFObjectWriter.cpp
+++ b/llvm/lib/MC/ELFObjectWriter.cpp
@@ -142,11 +142,11 @@ struct ELFWriter {
bool is64Bit() const;
bool usesRela(const MCSectionELF &Sec) const;
- uint64_t align(unsigned Alignment);
+ uint64_t align(Align Alignment);
bool maybeWriteCompression(uint32_t ChType, uint64_t Size,
SmallVectorImpl<uint8_t> &CompressedContents,
- unsigned Alignment);
+ Align Alignment);
public:
ELFWriter(ELFObjectWriter &OWriter, raw_pwrite_stream &OS,
@@ -201,7 +201,7 @@ struct ELFWriter {
void WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags,
uint64_t Address, uint64_t Offset, uint64_t Size,
- uint32_t Link, uint32_t Info, uint64_t Alignment,
+ uint32_t Link, uint32_t Info, MaybeAlign Alignment,
uint64_t EntrySize);
void writeRelocations(const MCAssembler &Asm, const MCSectionELF &Sec);
@@ -317,8 +317,9 @@ class ELFDwoObjectWriter : public ELFObjectWriter {
} // end anonymous namespace
-uint64_t ELFWriter::align(unsigned Alignment) {
- uint64_t Offset = W.OS.tell(), NewOffset = alignTo(Offset, Alignment);
+uint64_t ELFWriter::align(Align Alignment) {
+ uint64_t Offset = W.OS.tell();
+ uint64_t NewOffset = alignTo(Offset, Alignment);
W.OS.write_zeros(NewOffset - Offset);
return NewOffset;
}
@@ -622,7 +623,7 @@ void ELFWriter::computeSymbolTable(
SymtabSection->setAlignment(is64Bit() ? Align(8) : Align(4));
SymbolTableIndex = addToSectionTable(SymtabSection);
- uint64_t SecStart = align(SymtabSection->getAlignment());
+ uint64_t SecStart = align(SymtabSection->getAlign());
// The first entry is the undefined symbol entry.
Writer.writeSymbol(0, 0, 0, 0, 0, 0, false);
@@ -820,7 +821,7 @@ MCSectionELF *ELFWriter::createRelocationSection(MCContext &Ctx,
// Include the debug info compression header.
bool ELFWriter::maybeWriteCompression(
uint32_t ChType, uint64_t Size,
- SmallVectorImpl<uint8_t> &CompressedContents, unsigned Alignment) {
+ SmallVectorImpl<uint8_t> &CompressedContents, Align Alignment) {
uint64_t HdrSize =
is64Bit() ? sizeof(ELF::Elf32_Chdr) : sizeof(ELF::Elf64_Chdr);
if (Size <= HdrSize + CompressedContents.size())
@@ -831,12 +832,12 @@ bool ELFWriter::maybeWriteCompression(
write(static_cast<ELF::Elf64_Word>(ChType));
write(static_cast<ELF::Elf64_Word>(0)); // ch_reserved field.
write(static_cast<ELF::Elf64_Xword>(Size));
- write(static_cast<ELF::Elf64_Xword>(Alignment));
+ write(static_cast<ELF::Elf64_Xword>(Alignment.value()));
} else {
// Write Elf32_Chdr header otherwise.
write(static_cast<ELF::Elf32_Word>(ChType));
write(static_cast<ELF::Elf32_Word>(Size));
- write(static_cast<ELF::Elf32_Word>(Alignment));
+ write(static_cast<ELF::Elf32_Word>(Alignment.value()));
}
return true;
}
@@ -878,7 +879,7 @@ void ELFWriter::writeSectionData(const MCAssembler &Asm, MCSection &Sec,
compression::compress(compression::Params(CompressionType), Uncompressed,
Compressed);
if (!maybeWriteCompression(ChType, UncompressedData.size(), Compressed,
- Sec.getAlignment())) {
+ Sec.getAlign())) {
W.OS << UncompressedData;
return;
}
@@ -893,7 +894,7 @@ void ELFWriter::writeSectionData(const MCAssembler &Asm, MCSection &Sec,
void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags,
uint64_t Address, uint64_t Offset,
uint64_t Size, uint32_t Link, uint32_t Info,
- uint64_t Alignment, uint64_t EntrySize) {
+ MaybeAlign Alignment, uint64_t EntrySize) {
W.write<uint32_t>(Name); // sh_name: index into string table
W.write<uint32_t>(Type); // sh_type
WriteWord(Flags); // sh_flags
@@ -902,7 +903,7 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags,
WriteWord(Size); // sh_size
W.write<uint32_t>(Link); // sh_link
W.write<uint32_t>(Info); // sh_info
- WriteWord(Alignment); // sh_addralign
+ WriteWord(Alignment ? Alignment->value() : 0); // sh_addralign
WriteWord(EntrySize); // sh_entsize
}
@@ -1024,7 +1025,7 @@ void ELFWriter::writeSection(const SectionIndexMapTy &SectionIndexMap,
WriteSecHdrEntry(StrTabBuilder.getOffset(Section.getName()),
Section.getType(), Section.getFlags(), 0, Offset, Size,
- sh_link, sh_info, Section.getAlignment(),
+ sh_link, sh_info, Section.getAlign(),
Section.getEntrySize());
}
@@ -1036,7 +1037,7 @@ void ELFWriter::writeSectionHeader(
// Null section first.
uint64_t FirstSectionSize =
(NumSections + 1) >= ELF::SHN_LORESERVE ? NumSections + 1 : 0;
- WriteSecHdrEntry(0, 0, 0, 0, 0, FirstSectionSize, 0, 0, 0, 0);
+ WriteSecHdrEntry(0, 0, 0, 0, 0, FirstSectionSize, 0, 0, None, 0);
for (const MCSectionELF *Section : SectionTable) {
uint32_t GroupSymbolIndex;
@@ -1087,7 +1088,7 @@ uint64_t ELFWriter::writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) {
continue;
// Remember the offset into the file for this section.
- const uint64_t SecStart = align(Section.getAlignment());
+ const uint64_t SecStart = align(Section.getAlign());
const MCSymbolELF *SignatureSymbol = Section.getGroup();
writeSectionData(Asm, Section, Layout);
@@ -1124,7 +1125,7 @@ uint64_t ELFWriter::writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) {
for (MCSectionELF *Group : Groups) {
// Remember the offset into the file for this section.
- const uint64_t SecStart = align(Group->getAlignment());
+ const uint64_t SecStart = align(Group->getAlign());
const MCSymbol *SignatureSymbol = Group->getGroup();
assert(SignatureSymbol);
@@ -1156,7 +1157,7 @@ uint64_t ELFWriter::writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) {
for (MCSectionELF *RelSection : Relocations) {
// Remember the offset into the file for this section.
- const uint64_t SecStart = align(RelSection->getAlignment());
+ const uint64_t SecStart = align(RelSection->getAlign());
writeRelocations(Asm,
cast<MCSectionELF>(*RelSection->getLinkedToSection()));
@@ -1179,7 +1180,7 @@ uint64_t ELFWriter::writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) {
SectionOffsets[StrtabSection] = std::make_pair(SecStart, W.OS.tell());
}
- const uint64_t SectionHeaderOffset = align(is64Bit() ? 8 : 4);
+ const uint64_t SectionHeaderOffset = align(is64Bit() ? Align(8) : Align(4));
// ... then the section header table ...
writeSectionHeader(Layout, SectionIndexMap, SectionOffsets);
diff --git a/llvm/lib/MC/MCELFStreamer.cpp b/llvm/lib/MC/MCELFStreamer.cpp
index a79b62acde957..e5b46a63e7e1c 100644
--- a/llvm/lib/MC/MCELFStreamer.cpp
+++ b/llvm/lib/MC/MCELFStreamer.cpp
@@ -140,7 +140,7 @@ void MCELFStreamer::emitAssemblerFlag(MCAssemblerFlag Flag) {
static void setSectionAlignmentForBundling(const MCAssembler &Assembler,
MCSection *Section) {
if (Section && Assembler.isBundlingEnabled() && Section->hasInstructions() &&
- Section->getAlignment() < Assembler.getBundleAlignSize())
+ Section->getAlign() < Assembler.getBundleAlignSize())
Section->setAlignment(Align(Assembler.getBundleAlignSize()));
}
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index 739d1cb9b1bf1..c99f127e4cc73 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -652,7 +652,7 @@ void MCObjectStreamer::emitValueToAlignment(unsigned ByteAlignment,
// Update the maximum alignment on the current section if necessary.
MCSection *CurSec = getCurrentSectionOnly();
- if (ByteAlignment > CurSec->getAlignment())
+ if (CurSec->getAlign() < ByteAlignment)
CurSec->setAlignment(Align(ByteAlignment));
}
diff --git a/llvm/lib/MC/MCSectionXCOFF.cpp b/llvm/lib/MC/MCSectionXCOFF.cpp
index 9a35ac69c47c3..a48a936f64db4 100644
--- a/llvm/lib/MC/MCSectionXCOFF.cpp
+++ b/llvm/lib/MC/MCSectionXCOFF.cpp
@@ -20,8 +20,7 @@ using namespace llvm;
MCSectionXCOFF::~MCSectionXCOFF() = default;
void MCSectionXCOFF::printCsectDirective(raw_ostream &OS) const {
- OS << "\t.csect " << QualName->getName() << "," << Log2_32(getAlignment())
- << '\n';
+ OS << "\t.csect " << QualName->getName() << "," << Log2(getAlign()) << '\n';
}
void MCSectionXCOFF::printSwitchToSection(const MCAsmInfo &MAI, const Triple &T,
diff --git a/llvm/lib/MC/MCWinCOFFStreamer.cpp b/llvm/lib/MC/MCWinCOFFStreamer.cpp
index ad883131eae16..5d522f3841c3d 100644
--- a/llvm/lib/MC/MCWinCOFFStreamer.cpp
+++ b/llvm/lib/MC/MCWinCOFFStreamer.cpp
@@ -190,7 +190,7 @@ void MCWinCOFFStreamer::emitCOFFSafeSEH(MCSymbol const *Symbol) {
MCSection *SXData = getContext().getObjectFileInfo()->getSXDataSection();
getAssembler().registerSection(*SXData);
- if (SXData->getAlignment() < 4)
+ if (SXData->getAlign() < 4)
SXData->setAlignment(Align(4));
new MCSymbolIdFragment(Symbol, SXData);
@@ -207,7 +207,7 @@ void MCWinCOFFStreamer::emitCOFFSafeSEH(MCSymbol const *Symbol) {
void MCWinCOFFStreamer::emitCOFFSymbolIndex(MCSymbol const *Symbol) {
MCSection *Sec = getCurrentSectionOnly();
getAssembler().registerSection(*Sec);
- if (Sec->getAlignment() < 4)
+ if (Sec->getAlign() < 4)
Sec->setAlignment(Align(4));
new MCSymbolIdFragment(Symbol, getCurrentSectionOnly());
diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp
index dafae3a130d12..446d1372fa669 100644
--- a/llvm/lib/MC/MachObjectWriter.cpp
+++ b/llvm/lib/MC/MachObjectWriter.cpp
@@ -129,7 +129,7 @@ uint64_t MachObjectWriter::getPaddingSize(const MCSection *Sec,
const MCSection &NextSec = *Layout.getSectionOrder()[Next];
if (NextSec.isVirtualSection())
return 0;
- return offsetToAlignment(EndAddr, Align(NextSec.getAlignment()));
+ return offsetToAlignment(EndAddr, NextSec.getAlign());
}
void MachObjectWriter::writeHeader(MachO::HeaderFileType Type,
@@ -244,8 +244,7 @@ void MachObjectWriter::writeSection(const MCAsmLayout &Layout,
}
W.write<uint32_t>(FileOffset);
- assert(isPowerOf2_32(Section.getAlignment()) && "Invalid alignment!");
- W.write<uint32_t>(Log2_32(Section.getAlignment()));
+ W.write<uint32_t>(Log2(Section.getAlign()));
W.write<uint32_t>(NumRelocations ? RelocationsStart : 0);
W.write<uint32_t>(NumRelocations);
W.write<uint32_t>(Flags);
@@ -645,7 +644,7 @@ void MachObjectWriter::computeSectionAddresses(const MCAssembler &Asm,
const MCAsmLayout &Layout) {
uint64_t StartAddress = 0;
for (const MCSection *Sec : Layout.getSectionOrder()) {
- StartAddress = alignTo(StartAddress, Sec->getAlignment());
+ StartAddress = alignTo(StartAddress, Sec->getAlign());
SectionAddress[Sec] = StartAddress;
StartAddress += Layout.getSectionAddressSize(Sec);
diff --git a/llvm/lib/MC/WasmObjectWriter.cpp b/llvm/lib/MC/WasmObjectWriter.cpp
index 04049292ebff5..a4cb4149f0369 100644
--- a/llvm/lib/MC/WasmObjectWriter.cpp
+++ b/llvm/lib/MC/WasmObjectWriter.cpp
@@ -716,7 +716,7 @@ static void addData(SmallVectorImpl<char> &DataBytes,
MCSectionWasm &DataSection) {
LLVM_DEBUG(errs() << "addData: " << DataSection.getName() << "\n");
- DataBytes.resize(alignTo(DataBytes.size(), DataSection.getAlignment()));
+ DataBytes.resize(alignTo(DataBytes.size(), DataSection.getAlign()));
for (const MCFragment &Frag : DataSection) {
if (Frag.hasInstructions())
@@ -1498,7 +1498,7 @@ uint64_t WasmObjectWriter::writeOneObject(MCAssembler &Asm,
if (Section.isWasmData()) {
uint32_t SegmentIndex = DataSegments.size();
- DataSize = alignTo(DataSize, Section.getAlignment());
+ DataSize = alignTo(DataSize, Section.getAlign());
DataSegments.emplace_back();
WasmDataSegment &Segment = DataSegments.back();
Segment.Name = SectionName;
@@ -1508,7 +1508,7 @@ uint64_t WasmObjectWriter::writeOneObject(MCAssembler &Asm,
Segment.Offset = DataSize;
Segment.Section = &Section;
addData(Segment.Data, Section);
- Segment.Alignment = Log2_32(Section.getAlignment());
+ Segment.Alignment = Log2(Section.getAlign());
Segment.LinkingFlags = Section.getSegmentFlags();
DataSize += Segment.Data.size();
Section.setSegmentIndex(SegmentIndex);
diff --git a/llvm/lib/MC/WinCOFFObjectWriter.cpp b/llvm/lib/MC/WinCOFFObjectWriter.cpp
index e2d1a5d7b8ee5..22563bceef3ad 100644
--- a/llvm/lib/MC/WinCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/WinCOFFObjectWriter.cpp
@@ -267,7 +267,7 @@ COFFSection *WinCOFFObjectWriter::createSection(StringRef Name) {
}
static uint32_t getAlignment(const MCSectionCOFF &Sec) {
- switch (Sec.getAlignment()) {
+ switch (Sec.getAlign().value()) {
case 1:
return COFF::IMAGE_SCN_ALIGN_1BYTES;
case 2:
diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp
index 28715284475d8..c715d6b2bd50d 100644
--- a/llvm/lib/MC/XCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/XCOFFObjectWriter.cpp
@@ -1192,7 +1192,7 @@ void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
for (auto &Csect : *Group) {
const MCSectionXCOFF *MCSec = Csect.MCSec;
- Csect.Address = alignTo(Address, MCSec->getAlignment());
+ Csect.Address = alignTo(Address, MCSec->getAlign());
Csect.Size = Layout.getSectionAddressSize(MCSec);
Address = Csect.Address + Csect.Size;
Csect.SymbolTableIndex = SymbolTableIndex;
@@ -1247,7 +1247,7 @@ void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
if (!DwarfSections.empty())
PaddingsBeforeDwarf =
alignTo(Address,
- (*DwarfSections.begin()).DwarfSect->MCSec->getAlignment()) -
+ (*DwarfSections.begin()).DwarfSect->MCSec->getAlign()) -
Address;
DwarfSectionEntry *LastDwarfSection = nullptr;
@@ -1273,7 +1273,7 @@ void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
// This address is used to tell where is the section in the final object.
// See writeSectionForDwarfSectionEntry().
DwarfSection.Address = DwarfSect.Address =
- alignTo(Address, MCSec->getAlignment());
+ alignTo(Address, MCSec->getAlign());
// Section size.
// For DWARF section, we must use the real size which may be not aligned.
@@ -1448,9 +1448,7 @@ void XCOFFObjectWriter::writeSectionForExceptionSectionEntry(
// significant bits of a byte, then or's in the csect type into the least
// significant 3 bits.
uint8_t getEncodedType(const MCSectionXCOFF *Sec) {
- unsigned Align = Sec->getAlignment();
- assert(isPowerOf2_32(Align) && "Alignment must be a power of 2.");
- unsigned Log2Align = Log2_32(Align);
+ unsigned Log2Align = Log2(Sec->getAlign());
// Result is a number in the range [0, 31] which fits in the 5 least
// significant bits. Shift this value into the 5 most significant bits, and
// bitwise-or in the csect type.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index fd930fcaa6434..95cd11512138a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -253,7 +253,7 @@ void AMDGPUAsmPrinter::emitFunctionBodyEnd() {
// CP microcode requires the kernel descriptor to be allocated on 64 byte
// alignment.
Streamer.emitValueToAlignment(64, 0, 1, 0);
- if (ReadOnlySection.getAlignment() < 64)
+ if (ReadOnlySection.getAlign() < 64)
ReadOnlySection.setAlignment(Align(64));
const GCNSubtarget &STM = MF->getSubtarget<GCNSubtarget>();
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
index 49725801f0467..3d19736d2637c 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
@@ -117,7 +117,7 @@ void HexagonMCELFStreamer::HexagonMCEmitCommonSymbol(MCSymbol *Symbol,
}
// Update the maximum alignment of the section if necessary.
- if (Align(ByteAlignment) > Section.getAlignment())
+ if (Section.getAlign() < ByteAlignment)
Section.setAlignment(Align(ByteAlignment));
switchSection(P.first, P.second);
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index caae5890fae1d..67eb9edee0a58 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -899,9 +899,9 @@ void MipsTargetELFStreamer::finish() {
MCSection &BSSSection = *OFI.getBSSSection();
MCA.registerSection(BSSSection);
- TextSection.setAlignment(Align(std::max(16u, TextSection.getAlignment())));
- DataSection.setAlignment(Align(std::max(16u, DataSection.getAlignment())));
- BSSSection.setAlignment(Align(std::max(16u, BSSSection.getAlignment())));
+ TextSection.setAlignment(std::max(Align(16), TextSection.getAlign()));
+ DataSection.setAlignment(std::max(Align(16), DataSection.getAlign()));
+ BSSSection.setAlignment(std::max(Align(16), BSSSection.getAlign()));
if (RoundSectionSizes) {
// Make sections sizes a multiple of the alignment. This is useful for
@@ -912,14 +912,12 @@ void MipsTargetELFStreamer::finish() {
for (MCSection &S : MCA) {
MCSectionELF &Section = static_cast<MCSectionELF &>(S);
- unsigned Alignment = Section.getAlignment();
- if (Alignment) {
- OS.switchSection(&Section);
- if (Section.useCodeAlign())
- OS.emitCodeAlignment(Alignment, &STI, Alignment);
- else
- OS.emitValueToAlignment(Alignment, 0, 1, Alignment);
- }
+ Align Alignment = Section.getAlign();
+ OS.switchSection(&Section);
+ if (Section.useCodeAlign())
+ OS.emitCodeAlignment(Alignment.value(), &STI, Alignment.value());
+ else
+ OS.emitValueToAlignment(Alignment.value(), 0, 1, Alignment.value());
}
}
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 7a0ab70ba88b3..172db3f185e36 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -2589,7 +2589,7 @@ bool PPCAIXAsmPrinter::doInitialization(Module &M) {
getObjFileLowering().SectionForGlobal(GO, GOKind, TM));
Align GOAlign = getGVAlignment(GO, GO->getParent()->getDataLayout());
- if (GOAlign > Csect->getAlignment())
+ if (GOAlign > Csect->getAlign())
Csect->setAlignment(GOAlign);
};
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 2d92b8d5b574b..412b9db259e84 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -584,7 +584,7 @@ void X86AsmBackend::emitInstructionEnd(MCObjectStreamer &OS, const MCInst &Inst)
// Update the maximum alignment on the current section if necessary.
MCSection *Sec = OS.getCurrentSectionOnly();
- if (AlignBoundary.value() > Sec->getAlignment())
+ if (Sec->getAlign() < AlignBoundary)
Sec->setAlignment(AlignBoundary);
}
diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
index 2a4b640129d84..76f7136c3d7e4 100644
--- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -357,14 +357,14 @@ class HWAddressSanitizer {
/// If WithFrameRecord is true, then __hwasan_tls will be used to access the
/// ring buffer for storing stack allocations on targets that support it.
struct ShadowMapping {
- int Scale;
+ uint8_t Scale;
uint64_t Offset;
bool InGlobal;
bool InTls;
bool WithFrameRecord;
void init(Triple &TargetTriple, bool InstrumentWithCalls);
- uint64_t getObjectAlignment() const { return 1ULL << Scale; }
+ Align getObjectAlignment() const { return Align(1ULL << Scale); }
};
ShadowMapping Mapping;
@@ -959,7 +959,7 @@ bool HWAddressSanitizer::instrumentMemAccess(InterestingMemoryOperand &O) {
IRBuilder<> IRB(O.getInsn());
if (isPowerOf2_64(O.TypeSize) &&
(O.TypeSize / 8 <= (1ULL << (kNumberOfAccessSizes - 1))) &&
- (!O.Alignment || *O.Alignment >= (1ULL << Mapping.Scale) ||
+ (!O.Alignment || *O.Alignment >= Mapping.getObjectAlignment() ||
*O.Alignment >= O.TypeSize / 8)) {
size_t AccessSizeIndex = TypeSizeToSizeIndex(O.TypeSize);
if (InstrumentWithCalls) {
@@ -1003,9 +1003,9 @@ void HWAddressSanitizer::tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *Tag,
if (ShadowSize)
IRB.CreateMemSet(ShadowPtr, JustTag, ShadowSize, Align(1));
if (Size != AlignedSize) {
- IRB.CreateStore(
- ConstantInt::get(Int8Ty, Size % Mapping.getObjectAlignment()),
- IRB.CreateConstGEP1_32(Int8Ty, ShadowPtr, ShadowSize));
+ const uint8_t SizeRemainder = Size % Mapping.getObjectAlignment().value();
+ IRB.CreateStore(ConstantInt::get(Int8Ty, SizeRemainder),
+ IRB.CreateConstGEP1_32(Int8Ty, ShadowPtr, ShadowSize));
IRB.CreateStore(JustTag, IRB.CreateConstGEP1_32(
Int8Ty, IRB.CreateBitCast(AI, Int8PtrTy),
AlignedSize - 1));
@@ -1386,7 +1386,7 @@ bool HWAddressSanitizer::instrumentStack(memtag::StackInfo &SInfo,
for (auto &II : Info.LifetimeEnd)
II->eraseFromParent();
}
- memtag::alignAndPadAlloca(Info, Align(Mapping.getObjectAlignment()));
+ memtag::alignAndPadAlloca(Info, Mapping.getObjectAlignment());
}
for (auto &I : SInfo.UnrecognizedLifetimes)
I->eraseFromParent();
@@ -1512,7 +1512,7 @@ void HWAddressSanitizer::instrumentGlobal(GlobalVariable *GV, uint8_t Tag) {
NewGV->setLinkage(GlobalValue::PrivateLinkage);
NewGV->copyMetadata(GV, 0);
NewGV->setAlignment(
- MaybeAlign(std::max(GV->getAlignment(), Mapping.getObjectAlignment())));
+ std::max(GV->getAlign().valueOrOne(), Mapping.getObjectAlignment()));
// It is invalid to ICF two globals that have
diff erent tags. In the case
// where the size of the global is a multiple of the tag granularity the
diff --git a/llvm/tools/dsymutil/MachOUtils.cpp b/llvm/tools/dsymutil/MachOUtils.cpp
index 3bf455eb4eae6..a239ed2265b40 100644
--- a/llvm/tools/dsymutil/MachOUtils.cpp
+++ b/llvm/tools/dsymutil/MachOUtils.cpp
@@ -317,10 +317,10 @@ static bool createDwarfSegment(uint64_t VMAddr, uint64_t FileOffset,
if (Sec->begin() == Sec->end() || !Layout.getSectionFileSize(Sec))
continue;
- unsigned Align = Sec->getAlignment();
- if (Align > 1) {
- VMAddr = alignTo(VMAddr, Align);
- FileOffset = alignTo(FileOffset, Align);
+ Align Alignment = Sec->getAlign();
+ if (Alignment > 1) {
+ VMAddr = alignTo(VMAddr, Alignment);
+ FileOffset = alignTo(FileOffset, Alignment);
if (FileOffset > UINT32_MAX)
return error("section " + Sec->getName() + "'s file offset exceeds 4GB."
" Refusing to produce an invalid Mach-O file.");
@@ -477,7 +477,7 @@ bool generateDsymCompanion(
continue;
if (uint64_t Size = Layout.getSectionFileSize(Sec)) {
- DwarfSegmentSize = alignTo(DwarfSegmentSize, Sec->getAlignment());
+ DwarfSegmentSize = alignTo(DwarfSegmentSize, Sec->getAlign());
DwarfSegmentSize += Size;
++NumDwarfSections;
}
@@ -617,7 +617,7 @@ bool generateDsymCompanion(
continue;
uint64_t Pos = OutFile.tell();
- OutFile.write_zeros(alignTo(Pos, Sec.getAlignment()) - Pos);
+ OutFile.write_zeros(alignTo(Pos, Sec.getAlign()) - Pos);
MCAsm.writeSectionData(OutFile, &Sec, Layout);
}
More information about the llvm-commits
mailing list