[PATCH] D138521: [X86] Support ANDNP combine through broadcast instructions with scalar input
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 24 01:29:05 PST 2022
pengfei added inline comments.
================
Comment at: llvm/test/CodeGen/X86/combine-bitselect.ll:568
+define <4 x i32> @bitselect_v4i32_broadcast_rrr(i32 %a0, <4 x i32> %a1) {
+; SSE-LABEL: bitselect_v4i32_broadcast_rrr:
----------------
The name seems a bit confusing. It is not just a `v4i32` version of `bitselect_v4i64_broadcast_rrr`. Better give a meaningful name. Besides, why don't use `i64` type like others? And it's better to pre-commit the test to just show the diff in this patch.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138521/new/
https://reviews.llvm.org/D138521
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