[PATCH] D138591: [AAch64] Don't treat SVE scalable extends as free widening instructions

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 23 10:38:10 PST 2022


dmgreen created this revision.
dmgreen added reviewers: CarolineConcatto, david-arm, SjoerdMeijer, sdesmalen, labrinea.
Herald added subscribers: ctetreau, hiraditya, tschuett.
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dmgreen requested review of this revision.
Herald added a subscriber: alextsao1999.
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The logic in isWideningInstruction handles instructions like `uaddw` and `smull`, where `add(x, zext(y))` or `mul(sext(x), sext(y))` can be converted to single instructions, making the extends free. This doesn't apply the same to SVE instructions though.

(There are instructions like `ADDHNB`, but they require top/bottom lane interleaving. That is similar to MVE instructions, which required a special pass to perform the lane interleaving).

This patch just bails out of the call to isWideningInstruction if the vector is scalable, getting a more accurate cost.


https://reviews.llvm.org/D138591

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/AArch64/sve-widening-instruction.ll


Index: llvm/test/Analysis/CostModel/AArch64/sve-widening-instruction.ll
===================================================================
--- llvm/test/Analysis/CostModel/AArch64/sve-widening-instruction.ll
+++ llvm/test/Analysis/CostModel/AArch64/sve-widening-instruction.ll
@@ -20,8 +20,8 @@
 
 define <vscale x 8 x i32> @widening_v8i16(<vscale x 8 x i16> %in1, <vscale x 8 x i16> %in2) {
 ; CHECK-LABEL: 'widening_v8i16'
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %in1.ext = zext <vscale x 8 x i16> %in2 to <vscale x 8 x i32>
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %in2.ext = zext <vscale x 8 x i16> %in2 to <vscale x 8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %in1.ext = zext <vscale x 8 x i16> %in2 to <vscale x 8 x i32>
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 3 for instruction: %in2.ext = zext <vscale x 8 x i16> %in2 to <vscale x 8 x i32>
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %in.add = add <vscale x 8 x i32> %in1.ext, %in2.ext
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret <vscale x 8 x i32> %in.add
 ;
Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -1634,7 +1634,7 @@
 
   // If the cast is observable, and it is used by a widening instruction (e.g.,
   // uaddl, saddw, etc.), it may be free.
-  if (I && I->hasOneUser()) {
+  if (I && I->hasOneUser() && !isa<ScalableVectorType>(Src)) {
     auto *SingleUser = cast<Instruction>(*I->user_begin());
     SmallVector<const Value *, 4> Operands(SingleUser->operand_values());
     if (isWideningInstruction(Dst, SingleUser->getOpcode(), Operands)) {


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