[llvm] 7fefa99 - [AArch64] Add Host identifiers for cortex-a55, cortex-a510, cortex-a710 and cortex-x2.

[David Green via llvm-commits]

Author: David Green
Date: 2022-11-23T12:10:54Z
New Revision: 7fefa99445155cf019c25a0a1f152fde3f750cae

URL: https://github.com/llvm/llvm-project/commit/7fefa99445155cf019c25a0a1f152fde3f750cae
DIFF: https://github.com/llvm/llvm-project/commit/7fefa99445155cf019c25a0a1f152fde3f750cae.diff

LOG: [AArch64] Add Host identifiers for cortex-a55, cortex-a510, cortex-a710 and cortex-x2.

I noticed these were missing, so this adds Host identifiers for
cortex-a55, cortex-a510, cortex-a710 and cortex-x2, taken from their
respective TRMs.

Differential Revision: https://reviews.llvm.org/D138497

Added: 
    

Modified: 
    llvm/lib/Support/Host.cpp
    llvm/unittests/Support/Host.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 4fc3d7ca6c5a8..6bb452a854b1a 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -206,6 +206,8 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
         .Case("0xd02", "cortex-a34")
         .Case("0xd04", "cortex-a35")
         .Case("0xd03", "cortex-a53")
+        .Case("0xd05", "cortex-a55")
+        .Case("0xd46", "cortex-a510")
         .Case("0xd07", "cortex-a57")
         .Case("0xd08", "cortex-a72")
         .Case("0xd09", "cortex-a73")
@@ -213,9 +215,11 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
         .Case("0xd0b", "cortex-a76")
         .Case("0xd0d", "cortex-a77")
         .Case("0xd41", "cortex-a78")
+        .Case("0xd47", "cortex-a710")
         .Case("0xd4d", "cortex-a715")
         .Case("0xd44", "cortex-x1")
         .Case("0xd4c", "cortex-x1c")
+        .Case("0xd48", "cortex-x2")
         .Case("0xd4e", "cortex-x3")
         .Case("0xd0c", "neoverse-n1")
         .Case("0xd49", "neoverse-n2")

diff  --git a/llvm/unittests/Support/Host.cpp b/llvm/unittests/Support/Host.cpp
index 523e6e2195e41..7a999094f1ecf 100644
--- a/llvm/unittests/Support/Host.cpp
+++ b/llvm/unittests/Support/Host.cpp
@@ -106,6 +106,9 @@ TEST(getLinuxHostCPUName, AArch64) {
   EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
                                               "CPU part        : 0xd03"),
             "cortex-a53");
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
+                                              "CPU part        : 0xd05"),
+            "cortex-a55");
 
   EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
                                               "CPU part        : 0xd40"),
@@ -126,6 +129,15 @@ TEST(getLinuxHostCPUName, AArch64) {
   EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
                                               "CPU part        : 0x801"),
             "cortex-a73");
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
+                                              "CPU part        : 0xd46"),
+            "cortex-a510");
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
+                                              "CPU part        : 0xd47"),
+            "cortex-a710");
+  EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
+                                              "CPU part        : 0xd48"),
+            "cortex-x2");
   EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
                                               "CPU part        : 0xc00"),
             "falkor");