[PATCH] D138359: [TableGen] CheckSchedClassTables - check for unnecessary scheduler overrides

[Haohai, Wen via Phabricator via llvm-commits]

HaohaiWen added inline comments.


================
Comment at: llvm/utils/TableGen/SubtargetEmitter.cpp:1318
+                   << Inst->TheDef->getName() << "' from '" << CgOrig.Name
+                   << "'\n";
+          }
----------------
pengfei wrote:
> Do we need to break the loop?
Can we use InstRW to overwrite same instruction on same schedule model twice?
I tried and trigged assertion in  CodeGenSchedule.cpp:1088.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138359/new/

https://reviews.llvm.org/D138359