[llvm] 13e6050 - [NFC][SROA] Add some more tests for vector promotion

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2022-11-23T02:38:25+03:00
New Revision: 13e605051f7d6a08bb1973e70dc3ef6ba1e104ee

URL: https://github.com/llvm/llvm-project/commit/13e605051f7d6a08bb1973e70dc3ef6ba1e104ee
DIFF: https://github.com/llvm/llvm-project/commit/13e605051f7d6a08bb1973e70dc3ef6ba1e104ee.diff

LOG: [NFC][SROA] Add some more tests for vector promotion

Added: 
    

Modified: 
    llvm/test/Transforms/SROA/vector-promotion.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SROA/vector-promotion.ll b/llvm/test/Transforms/SROA/vector-promotion.ll
index 1447bedb92d0..bdf50ea39af3 100644
--- a/llvm/test/Transforms/SROA/vector-promotion.ll
+++ b/llvm/test/Transforms/SROA/vector-promotion.ll
@@ -564,3 +564,65 @@ define <4 x float> @test12(<4 x i32> %val) {
 
   ret <4 x float> %vec
 }
+
+define void @swap-8bytes(ptr %x, ptr %y) {
+; CHECK-LABEL: @swap-8bytes(
+; CHECK-NEXT:    [[TMP_SROA_0_0_COPYLOAD:%.*]] = load i64, ptr [[X:%.*]], align 1
+; CHECK-NEXT:    tail call void @llvm.memcpy.p0.p0.i64(ptr [[X]], ptr [[Y:%.*]], i64 8, i1 false)
+; CHECK-NEXT:    store i64 [[TMP_SROA_0_0_COPYLOAD]], ptr [[Y]], align 1
+; CHECK-NEXT:    ret void
+;
+  %tmp = alloca [2 x i32]
+  call void @llvm.memcpy.p0.p0.i64(ptr %tmp, ptr %x, i64 8, i1 false)
+  tail call void @llvm.memcpy.p0.p0.i64(ptr %x, ptr %y, i64 8, i1 false)
+  call void @llvm.memcpy.p0.p0.i64(ptr %y, ptr %tmp, i64 8, i1 false)
+  ret void
+}
+
+define void @swap-7bytes(ptr %x, ptr %y) {
+; CHECK-LABEL: @swap-7bytes(
+; CHECK-NEXT:    [[TMP:%.*]] = alloca [7 x i8], align 1
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr [[TMP]], ptr [[X:%.*]], i64 7, i1 false)
+; CHECK-NEXT:    tail call void @llvm.memcpy.p0.p0.i64(ptr [[X]], ptr [[Y:%.*]], i64 7, i1 false)
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr [[Y]], ptr [[TMP]], i64 7, i1 false)
+; CHECK-NEXT:    ret void
+;
+  %tmp = alloca [7 x i8]
+  call void @llvm.memcpy.p0.p0.i64(ptr %tmp, ptr %x, i64 7, i1 false)
+  tail call void @llvm.memcpy.p0.p0.i64(ptr %x, ptr %y, i64 7, i1 false)
+  call void @llvm.memcpy.p0.p0.i64(ptr %y, ptr %tmp, i64 7, i1 false)
+  ret void
+}
+
+define void @swap-16bytes(ptr %x, ptr %y) {
+; CHECK-LABEL: @swap-16bytes(
+; CHECK-NEXT:    [[TMP:%.*]] = alloca [2 x i64], align 8
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr [[TMP]], ptr [[X:%.*]], i64 16, i1 false)
+; CHECK-NEXT:    tail call void @llvm.memcpy.p0.p0.i64(ptr [[X]], ptr [[Y:%.*]], i64 16, i1 false)
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr [[Y]], ptr [[TMP]], i64 16, i1 false)
+; CHECK-NEXT:    ret void
+;
+  %tmp = alloca [2 x i64]
+  call void @llvm.memcpy.p0.p0.i64(ptr %tmp, ptr %x, i64 16, i1 false)
+  tail call void @llvm.memcpy.p0.p0.i64(ptr %x, ptr %y, i64 16, i1 false)
+  call void @llvm.memcpy.p0.p0.i64(ptr %y, ptr %tmp, i64 16, i1 false)
+  ret void
+}
+
+define void @swap-15bytes(ptr %x, ptr %y) {
+; CHECK-LABEL: @swap-15bytes(
+; CHECK-NEXT:    [[TMP:%.*]] = alloca [15 x i8], align 1
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr [[TMP]], ptr [[X:%.*]], i64 15, i1 false)
+; CHECK-NEXT:    tail call void @llvm.memcpy.p0.p0.i64(ptr [[X]], ptr [[Y:%.*]], i64 15, i1 false)
+; CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr [[Y]], ptr [[TMP]], i64 15, i1 false)
+; CHECK-NEXT:    ret void
+;
+  %tmp = alloca [15 x i8]
+  call void @llvm.memcpy.p0.p0.i64(ptr %tmp, ptr %x, i64 15, i1 false)
+  tail call void @llvm.memcpy.p0.p0.i64(ptr %x, ptr %y, i64 15, i1 false)
+  call void @llvm.memcpy.p0.p0.i64(ptr %y, ptr %tmp, i64 15, i1 false)
+  ret void
+}
+
+declare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1)
+declare void @llvm.lifetime.end.p0(i64, ptr)