[PATCH] D135229: [AArch64] Extending lowering of 'trunc <(8|16) x (i16|i64)> %x to <(8|16) x i8>' to use tbl instructions
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 22 10:44:37 PST 2022
fhahn added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13405
+ int NumElements = cast<FixedVectorType>(TI->getType())->getNumElements();
+ auto *SrcTy = cast<FixedVectorType>(TI->getOperand(0)->getType());
+ auto *DstTy = cast<FixedVectorType>(TI->getType());
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fhahn wrote:
> Is this guaranteed to be a fixed vector type? Could you add a variant of a test with truncates of scalable vectors (`<vscale x 16 x i8>` or something like that?
I think it should be fine, I added a test in 4783345426da
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D135229/new/
https://reviews.llvm.org/D135229
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