[llvm] 629f17c - [DAG] isGuaranteedNotToBeUndefOrPoison - handle FrameIndex/TargetFrameIndex

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 22 10:16:27 PST 2022


Author: Simon Pilgrim
Date: 2022-11-22T18:16:15Z
New Revision: 629f17c5163762852db03581f187cf3b082a2a34

URL: https://github.com/llvm/llvm-project/commit/629f17c5163762852db03581f187cf3b082a2a34
DIFF: https://github.com/llvm/llvm-project/commit/629f17c5163762852db03581f187cf3b082a2a34.diff

LOG: [DAG] isGuaranteedNotToBeUndefOrPoison - handle FrameIndex/TargetFrameIndex

Fixes #58904

Added: 
    llvm/test/CodeGen/WebAssembly/pr58904.ll

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 3d38968a7bc3b..009675e235136 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4560,6 +4560,8 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op,
 
   switch (Opcode) {
   case ISD::VALUETYPE:
+  case ISD::FrameIndex:
+  case ISD::TargetFrameIndex:
     return true;
 
   case ISD::UNDEF:

diff  --git a/llvm/test/CodeGen/WebAssembly/pr58904.ll b/llvm/test/CodeGen/WebAssembly/pr58904.ll
new file mode 100644
index 0000000000000..b8d5e397be028
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/pr58904.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=wasm32-- | FileCheck %s
+
+define i64 @PR58904() {
+; CHECK-LABEL: PR58904:
+; CHECK:         .functype PR58904 () -> (i64)
+; CHECK-NEXT:  # %bb.0: # %BB
+; CHECK-NEXT:    global.get __stack_pointer
+; CHECK-NEXT:    i32.const 16
+; CHECK-NEXT:    i32.sub
+; CHECK-NEXT:    i32.const 8
+; CHECK-NEXT:    i32.add
+; CHECK-NEXT:    i64.extend_i32_u
+; CHECK-NEXT:    # fallthrough-return
+BB:
+  %A = alloca i64
+  %C2 = ptrtoint i64* %A to i64
+  %B2 = urem i64 %C2, -1
+  ret i64 %B2
+}


        


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