[PATCH] D138502: [RISCV] Simplify eliminateFrameIndex in advance of reuse [nfc-ish]

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
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The prior code intermixed several concerns - the actual materialization of the offset, the choice of destination register, and whether to prune the ADDI.  This version factors the first part out, and then reasons only about the later two.  My intention is to merge the adjustReg routine with the one from frame lowering, and then explore using the merged result to simplify frame setup and tear down.

This change is conceptually NFC, but since it results in slightly different vreg usage, the end result can change register allocation in minor ways.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138502

Files:
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.h
  llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
  llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir

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