[PATCH] D138401: [DAGCombiner] fold or (xor x, y),? patterns

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 updated this revision to Diff 477066.
bcl5980 added a comment.

add a test to amdgpu for or (xor x, y), x --> or x, y
adjust test sra_to_sextload_multiple_sra_uses


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138401/new/

https://reviews.llvm.org/D138401

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AMDGPU/fshl.ll
  llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/avx512bw-mask-op.ll
  llvm/test/CodeGen/X86/avx512dq-mask-op.ll
  llvm/test/CodeGen/X86/combine-sra-load.ll

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