[PATCH] D138208: [AArch64][SME] Always allocate a lazy-save buffer if a function has ZA state.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 21 08:33:41 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3f9d64a2adc5: [AArch64][SME] Always allocate a lazy-save buffer if a function has ZA state. (authored by sdesmalen).
Changed prior to commit:
https://reviews.llvm.org/D138208?vs=476116&id=476921#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138208/new/
https://reviews.llvm.org/D138208
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
Index: llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
===================================================================
--- llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
+++ llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
@@ -48,12 +48,12 @@
; CHECK-NEXT: sub x9, x9, x8
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: sub x10, x29, #16
-; CHECK-NEXT: sturh w8, [x29, #-8]
; CHECK-NEXT: stur x9, [x29, #-16]
+; CHECK-NEXT: sturh w8, [x29, #-8]
; CHECK-NEXT: msr TPIDR2_EL0, x10
; CHECK-NEXT: bl __addtf3
; CHECK-NEXT: smstart za
-; CHECK-NEXT: add x0, x29, #0
+; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: cbnz x8, .LBB1_2
; CHECK-NEXT: // %bb.1:
Index: llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
===================================================================
--- llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
+++ llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
@@ -310,12 +310,12 @@
; CHECK-COMMON-NEXT: sub x9, x9, x8
; CHECK-COMMON-NEXT: mov sp, x9
; CHECK-COMMON-NEXT: sub x10, x29, #16
-; CHECK-COMMON-NEXT: sturh w8, [x29, #-8]
; CHECK-COMMON-NEXT: stur x9, [x29, #-16]
+; CHECK-COMMON-NEXT: sturh w8, [x29, #-8]
; CHECK-COMMON-NEXT: msr TPIDR2_EL0, x10
; CHECK-COMMON-NEXT: bl __addtf3
; CHECK-COMMON-NEXT: smstart za
-; CHECK-COMMON-NEXT: add x0, x29, #0
+; CHECK-COMMON-NEXT: sub x0, x29, #16
; CHECK-COMMON-NEXT: mrs x8, TPIDR2_EL0
; CHECK-COMMON-NEXT: cbnz x8, .LBB8_2
; CHECK-COMMON-NEXT: // %bb.1:
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6013,21 +6013,6 @@
}
-/// Returns true if the Function has ZA state and contains at least one call to
-/// a function that requires setting up a lazy-save buffer.
-static bool requiresBufferForLazySave(const Function &F) {
- SMEAttrs CallerAttrs(F);
- if (!CallerAttrs.hasZAState())
- return false;
-
- for (const BasicBlock &BB : F)
- for (const Instruction &I : BB)
- if (const CallInst *Call = dyn_cast<CallInst>(&I))
- if (CallerAttrs.requiresLazySave(SMEAttrs(*Call)))
- return true;
- return false;
-}
-
unsigned
AArch64TargetLowering::allocateLazySaveBuffer(SDValue &Chain, const SDLoc &DL,
SelectionDAG &DAG) const {
@@ -6443,8 +6428,8 @@
if (Subtarget->hasCustomCallingConv())
Subtarget->getRegisterInfo()->UpdateCustomCalleeSavedRegs(MF);
- if (requiresBufferForLazySave(MF.getFunction())) {
- // Set up a buffer once and store the buffer in the MachineFunctionInfo.
+ // Conservatively assume the function requires the lazy-save mechanism.
+ if (SMEAttrs(MF.getFunction()).hasZAState()) {
unsigned TPIDR2Obj = allocateLazySaveBuffer(Chain, DL, DAG);
FuncInfo->setLazySaveTPIDR2Obj(TPIDR2Obj);
}
@@ -7041,9 +7026,6 @@
SDValue NN = DAG.getNode(ISD::MUL, DL, MVT::i64, N, N);
unsigned TPIDR2Obj = FuncInfo->getLazySaveTPIDR2Obj();
- if (!TPIDR2Obj)
- TPIDR2Obj = allocateLazySaveBuffer(Chain, DL, DAG);
-
MachinePointerInfo MPI = MachinePointerInfo::getStack(MF, TPIDR2Obj);
SDValue TPIDR2ObjAddr = DAG.getFrameIndex(TPIDR2Obj,
DAG.getTargetLoweringInfo().getFrameIndexTy(DAG.getDataLayout()));
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