[llvm] 0c22cdf - [MachineTraceMetrics] Precommit test for D138272

[Anton Sidorenko via llvm-commits]

Author: Anton Sidorenko
Date: 2022-11-21T12:55:40+03:00
New Revision: 0c22cdfdd1bff6b0fddba8124ab5478884d1629c

URL: https://github.com/llvm/llvm-project/commit/0c22cdfdd1bff6b0fddba8124ab5478884d1629c
DIFF: https://github.com/llvm/llvm-project/commit/0c22cdfdd1bff6b0fddba8124ab5478884d1629c.diff

LOG: [MachineTraceMetrics] Precommit test for D138272

Added: 
    llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll b/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll
new file mode 100644
index 0000000000000..f84146580d4ca
--- /dev/null
+++ b/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll
@@ -0,0 +1,52 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-unknown -x86-early-ifcvt -debug-only=early-ifcvt < %s 2>&1 | FileCheck %s
+
+; This test case ensures that machine trace metrics properly calculates
+; instructions heights and the trace's critical path for the entry block when
+; MinInstr strategy is used. The behavior is demonstrated on early if conversion
+; pass.
+
+; CHECK: TBB: MinInstr trace %bb.0 --> %bb.0 --> %bb.0: 4 instrs. 1 cycles.
+; CHECK: %bb.0
+
+; CHECK: FBB: MinInstr trace %bb.0 --> %bb.1 --> %bb.2: 10 instrs. 32 cycles.
+; CHECK: %bb.1 <- %bb.0
+; CHECK:     -> %bb.2
+
+; CHECK: Resource length 10, minimal critical path 1
+; CHECK: Not enough available ILP.
+
+define i32 @_Z3fooiidd(i32 %a, i32 %b, double %d, double %e) #0 {
+; CHECK-LABEL: _Z3fooiidd:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    addl %edi, %eax
+; CHECK-NEXT:    cmpl $3, %edi
+; CHECK-NEXT:    jl .LBB0_2
+; CHECK-NEXT:  # %bb.1: # %if.then
+; CHECK-NEXT:    cvttsd2si %xmm0, %ecx
+; CHECK-NEXT:    addl %ecx, %eax
+; CHECK-NEXT:  .LBB0_2: # %if.end
+; CHECK-NEXT:    cvttsd2si %xmm1, %ecx
+; CHECK-NEXT:    cltd
+; CHECK-NEXT:    idivl %ecx
+; CHECK-NEXT:    retq
+entry:
+  %add = add nsw i32 %b, %a
+  %cmp = icmp sgt i32 %a, 2
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+  %conv = fptosi double %d to i32
+  %add1 = add nsw i32 %add, %conv
+  br label %if.end
+
+if.end:
+  %tmp.0 = phi i32 [ %add1, %if.then ], [ %add, %entry ]
+  %conv2 = fptosi double %e to i32
+  %div = sdiv i32 %tmp.0, %conv2
+  ret i32 %div
+}
+
+attributes #0 = { "tune-cpu"="generic" }
+