[PATCH] D136236: [AMDGPU][GISel] Allow VReg srcs in (build_vector undef, i16) pattern

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh closed this revision.
Pierre-vh added a comment.

Done as part of D136459 <https://reviews.llvm.org/D136459> - results on codegen in D134354 <https://reviews.llvm.org/D134354> are identical.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136236/new/

https://reviews.llvm.org/D136236