[llvm] f72416e - AMDGPU: Fix missing divergence tests for csub intrinsics

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-11-06T22:14:12-08:00
New Revision: f72416e974b3d831ffa2672202a782b17b4cd5b4

URL: https://github.com/llvm/llvm-project/commit/f72416e974b3d831ffa2672202a782b17b4cd5b4
DIFF: https://github.com/llvm/llvm-project/commit/f72416e974b3d831ffa2672202a782b17b4cd5b4.diff

LOG: AMDGPU: Fix missing divergence tests for csub intrinsics

Added: 
    

Modified: 
    llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll
    llvm/test/Analysis/LegacyDivergenceAnalysis/AMDGPU/atomics.ll

Removed: 
    


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diff  --git a/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll b/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll
index 0833c3516d287..dec529a23107e 100644
--- a/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll
+++ b/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/atomics.ll
@@ -41,5 +41,14 @@ declare i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* nocapture, i64,
 declare i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* nocapture, i32, i32, i32, i1) #1
 declare i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* nocapture, i64, i32, i32, i1) #1
 
+; CHECK: DIVERGENT: %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* %ptr, i32 %val)
+define amdgpu_kernel void @test_atomic_csub_i32(i32 addrspace(1)* %ptr, i32 %val) #0 {
+  %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* %ptr, i32 %val)
+  store i32 %ret, i32 addrspace(1)* %ptr, align 4
+  ret void
+}
+
+declare i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* nocapture, i32) #1
+
 attributes #0 = { nounwind }
-attributes #1 = { nounwind argmemonly }
+attributes #1 = { argmemonly nounwind willreturn }

diff  --git a/llvm/test/Analysis/LegacyDivergenceAnalysis/AMDGPU/atomics.ll b/llvm/test/Analysis/LegacyDivergenceAnalysis/AMDGPU/atomics.ll
index dfb54c8f97dce..932ac8ede1f55 100644
--- a/llvm/test/Analysis/LegacyDivergenceAnalysis/AMDGPU/atomics.ll
+++ b/llvm/test/Analysis/LegacyDivergenceAnalysis/AMDGPU/atomics.ll
@@ -41,5 +41,14 @@ declare i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* nocapture, i64,
 declare i32 @llvm.amdgcn.atomic.dec.i32.p1i32(i32 addrspace(1)* nocapture, i32, i32, i32, i1) #1
 declare i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* nocapture, i64, i32, i32, i1) #1
 
+; CHECK: DIVERGENT: %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* %ptr, i32 %val)
+define amdgpu_kernel void @test_atomic_csub_i32(i32 addrspace(1)* %ptr, i32 %val) #0 {
+  %ret = call i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* %ptr, i32 %val)
+  store i32 %ret, i32 addrspace(1)* %ptr, align 4
+  ret void
+}
+
+declare i32 @llvm.amdgcn.global.atomic.csub.p1i32(i32 addrspace(1)* nocapture, i32) #1
+
 attributes #0 = { nounwind }
-attributes #1 = { nounwind argmemonly }
+attributes #1 = { argmemonly nounwind willreturn }