[llvm] 4e56aa2 - [X86] Schedule scalar movsx/movzx load+extend ops as WriteLoad instead of WriteALULd
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 6 06:32:17 PST 2022
Author: Simon Pilgrim
Date: 2022-11-06T14:32:05Z
New Revision: 4e56aa252fc983574e32a0cb8b73333831f66700
URL: https://github.com/llvm/llvm-project/commit/4e56aa252fc983574e32a0cb8b73333831f66700
DIFF: https://github.com/llvm/llvm-project/commit/4e56aa252fc983574e32a0cb8b73333831f66700.diff
LOG: [X86] Schedule scalar movsx/movzx load+extend ops as WriteLoad instead of WriteALULd
Although some very old x86 hardware would perform the extension as a later stage, every target we have a scheduler for always performs this as part of the load-op (avoid ALU pipes etc.). If anyone wants to model very old hardware they can always override this.
This patch just tags these as WriteLoad directly and removes unnecessary overrides - this cleans up some latency/throughput tests as they aren't being badly modelled as folded ALU ops
Added:
Modified:
llvm/lib/Target/X86/X86InstrExtension.td
llvm/lib/Target/X86/X86SchedBroadwell.td
llvm/lib/Target/X86/X86SchedHaswell.td
llvm/lib/Target/X86/X86SchedIceLake.td
llvm/lib/Target/X86/X86SchedSandyBridge.td
llvm/lib/Target/X86/X86SchedSkylakeClient.td
llvm/lib/Target/X86/X86SchedSkylakeServer.td
llvm/lib/Target/X86/X86ScheduleZnver1.td
llvm/lib/Target/X86/X86ScheduleZnver2.td
llvm/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s
llvm/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
llvm/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s
llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s
llvm/test/tools/llvm-mca/X86/Znver3/resources-x86_64.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrExtension.td b/llvm/lib/Target/X86/X86InstrExtension.td
index 7a4eb138ec346..8d3fce7f55bc6 100644
--- a/llvm/lib/Target/X86/X86InstrExtension.td
+++ b/llvm/lib/Target/X86/X86InstrExtension.td
@@ -42,7 +42,7 @@ def MOVSX16rr8 : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src),
let mayLoad = 1 in
def MOVSX16rm8 : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src),
"movs{bw|x}\t{$src, $dst|$dst, $src}", []>,
- TB, OpSize16, Sched<[WriteALULd]>;
+ TB, OpSize16, Sched<[WriteLoad]>;
} // hasSideEffects = 0
def MOVSX32rr8 : I<0xBE, MRMSrcReg, (outs GR32:$dst), (ins GR8:$src),
"movs{bl|x}\t{$src, $dst|$dst, $src}",
@@ -51,7 +51,7 @@ def MOVSX32rr8 : I<0xBE, MRMSrcReg, (outs GR32:$dst), (ins GR8:$src),
def MOVSX32rm8 : I<0xBE, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src),
"movs{bl|x}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (sextloadi32i8 addr:$src))]>, TB,
- OpSize32, Sched<[WriteALULd]>;
+ OpSize32, Sched<[WriteLoad]>;
def MOVSX32rr16: I<0xBF, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src),
"movs{wl|x}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (sext GR16:$src))]>, TB,
@@ -59,7 +59,7 @@ def MOVSX32rr16: I<0xBF, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src),
def MOVSX32rm16: I<0xBF, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
"movs{wl|x}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (sextloadi32i16 addr:$src))]>,
- OpSize32, TB, Sched<[WriteALULd]>;
+ OpSize32, TB, Sched<[WriteLoad]>;
let hasSideEffects = 0 in {
def MOVZX16rr8 : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src),
@@ -68,7 +68,7 @@ def MOVZX16rr8 : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src),
let mayLoad = 1 in
def MOVZX16rm8 : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src),
"movz{bw|x}\t{$src, $dst|$dst, $src}", []>,
- TB, OpSize16, Sched<[WriteALULd]>;
+ TB, OpSize16, Sched<[WriteLoad]>;
} // hasSideEffects = 0
def MOVZX32rr8 : I<0xB6, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src),
"movz{bl|x}\t{$src, $dst|$dst, $src}",
@@ -77,7 +77,7 @@ def MOVZX32rr8 : I<0xB6, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src),
def MOVZX32rm8 : I<0xB6, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src),
"movz{bl|x}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (zextloadi32i8 addr:$src))]>, TB,
- OpSize32, Sched<[WriteALULd]>;
+ OpSize32, Sched<[WriteLoad]>;
def MOVZX32rr16: I<0xB7, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src),
"movz{wl|x}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (zext GR16:$src))]>, TB,
@@ -85,7 +85,7 @@ def MOVZX32rr16: I<0xB7, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src),
def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
"movz{wl|x}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (zextloadi32i16 addr:$src))]>,
- TB, OpSize32, Sched<[WriteALULd]>;
+ TB, OpSize32, Sched<[WriteLoad]>;
// These instructions exist as a consequence of operand size prefix having
// control of the destination size, but not the input size. Only support them
@@ -100,10 +100,10 @@ def MOVZX16rr16: I<0xB7, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
let mayLoad = 1 in {
def MOVSX16rm16: I<0xBF, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
"movs{ww|x}\t{$src, $dst|$dst, $src}",
- []>, OpSize16, TB, Sched<[WriteALULd]>, NotMemoryFoldable;
+ []>, OpSize16, TB, Sched<[WriteLoad]>, NotMemoryFoldable;
def MOVZX16rm16: I<0xB7, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
"movz{ww|x}\t{$src, $dst|$dst, $src}",
- []>, TB, OpSize16, Sched<[WriteALULd]>, NotMemoryFoldable;
+ []>, TB, OpSize16, Sched<[WriteLoad]>, NotMemoryFoldable;
} // mayLoad = 1
} // isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0
@@ -119,7 +119,7 @@ let mayLoad = 1 in
def MOVZX32rm8_NOREX : I<0xB6, MRMSrcMem,
(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
"movz{bl|x}\t{$src, $dst|$dst, $src}",
- []>, TB, OpSize32, Sched<[WriteALULd]>;
+ []>, TB, OpSize32, Sched<[WriteLoad]>;
def MOVSX32rr8_NOREX : I<0xBE, MRMSrcReg,
(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
@@ -129,7 +129,7 @@ let mayLoad = 1 in
def MOVSX32rm8_NOREX : I<0xBE, MRMSrcMem,
(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
"movs{bl|x}\t{$src, $dst|$dst, $src}",
- []>, TB, OpSize32, Sched<[WriteALULd]>;
+ []>, TB, OpSize32, Sched<[WriteLoad]>;
}
// MOVSX64rr8 always has a REX prefix and it has an 8-bit register
@@ -143,7 +143,7 @@ def MOVSX64rr8 : RI<0xBE, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src),
def MOVSX64rm8 : RI<0xBE, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src),
"movs{bq|x}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (sextloadi64i8 addr:$src))]>,
- TB, Sched<[WriteALULd]>;
+ TB, Sched<[WriteLoad]>;
def MOVSX64rr16: RI<0xBF, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src),
"movs{wq|x}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (sext GR16:$src))]>, TB,
@@ -151,7 +151,7 @@ def MOVSX64rr16: RI<0xBF, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src),
def MOVSX64rm16: RI<0xBF, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
"movs{wq|x}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (sextloadi64i16 addr:$src))]>,
- TB, Sched<[WriteALULd]>;
+ TB, Sched<[WriteLoad]>;
def MOVSX64rr32: RI<0x63, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src),
"movs{lq|xd}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (sext GR32:$src))]>,
@@ -159,7 +159,7 @@ def MOVSX64rr32: RI<0x63, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src),
def MOVSX64rm32: RI<0x63, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src),
"movs{lq|xd}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (sextloadi64i32 addr:$src))]>,
- Sched<[WriteALULd]>, Requires<[In64BitMode]>;
+ Sched<[WriteLoad]>, Requires<[In64BitMode]>;
// These instructions exist as a consequence of operand size prefix having
// control of the destination size, but not the input size. Only support them
@@ -174,10 +174,10 @@ def MOVSX32rr32: I<0x63, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
let mayLoad = 1 in {
def MOVSX16rm32: I<0x63, MRMSrcMem, (outs GR16:$dst), (ins i32mem:$src),
"movs{lq|xd}\t{$src, $dst|$dst, $src}", []>,
- Sched<[WriteALULd]>, OpSize16, Requires<[In64BitMode]>;
+ Sched<[WriteLoad]>, OpSize16, Requires<[In64BitMode]>;
def MOVSX32rm32: I<0x63, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"movs{lq|xd}\t{$src, $dst|$dst, $src}", []>,
- Sched<[WriteALULd]>, OpSize32, Requires<[In64BitMode]>;
+ Sched<[WriteLoad]>, OpSize32, Requires<[In64BitMode]>;
} // mayLoad = 1
} // isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0
@@ -189,14 +189,14 @@ def MOVZX64rr8 : RI<0xB6, MRMSrcReg, (outs GR64:$dst), (ins GR8:$src),
let mayLoad = 1 in
def MOVZX64rm8 : RI<0xB6, MRMSrcMem, (outs GR64:$dst), (ins i8mem:$src),
"movz{bq|x}\t{$src, $dst|$dst, $src}", []>,
- TB, Sched<[WriteALULd]>;
+ TB, Sched<[WriteLoad]>;
def MOVZX64rr16 : RI<0xB7, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src),
"movz{wq|x}\t{$src, $dst|$dst, $src}", []>,
TB, Sched<[WriteALU]>;
let mayLoad = 1 in
def MOVZX64rm16 : RI<0xB7, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
"movz{wq|x}\t{$src, $dst|$dst, $src}", []>,
- TB, Sched<[WriteALULd]>;
+ TB, Sched<[WriteLoad]>;
}
// 64-bit zero-extension patterns use SUBREG_TO_REG and an operation writing a
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index d4ffdea79c5cf..01c84048c60ba 100644
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -908,8 +908,6 @@ def BWWriteResGroup49 : SchedWriteRes<[BWPort23]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[BWWriteResGroup49], (instregex "MOVSX(16|32|64)rm(8|16|32)",
- "MOVZX(16|32|64)rm(8|16)")>;
def: InstRW<[BWWriteResGroup49], (instrs VBROADCASTSSrm,
VMOVDDUPrm, MOVDDUPrm,
VMOVSHDUPrm, MOVSHDUPrm,
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 13b0ed25361e9..44fc1acf6b742 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -886,9 +886,7 @@ def HWWriteResGroup0_2 : SchedWriteRes<[HWPort23]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[HWWriteResGroup0_2], (instregex "MOVSX(16|32|64)rm(8|16|32)",
- "MOVZX(16|32|64)rm(8|16)",
- "(V?)MOVDDUPrm")>;
+def: InstRW<[HWWriteResGroup0_2], (instregex "(V?)MOVDDUPrm")>;
def HWWriteResGroup1 : SchedWriteRes<[HWPort4,HWPort237]> {
let Latency = 1;
diff --git a/llvm/lib/Target/X86/X86SchedIceLake.td b/llvm/lib/Target/X86/X86SchedIceLake.td
index fe812a2d71ecf..43fb6eeacc256 100644
--- a/llvm/lib/Target/X86/X86SchedIceLake.td
+++ b/llvm/lib/Target/X86/X86SchedIceLake.td
@@ -1071,9 +1071,7 @@ def ICXWriteResGroup58 : SchedWriteRes<[ICXPort23]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[ICXWriteResGroup58], (instregex "MOVSX(16|32|64)rm(8|16|32)",
- "MOVZX(16|32|64)rm(8|16)",
- "(V?)MOVDDUPrm")>; // TODO: Should this be ICXWriteResGroup71?
+def: InstRW<[ICXWriteResGroup58], (instregex "(V?)MOVDDUPrm")>; // TODO: Should this be ICXWriteResGroup71?
def ICXWriteResGroup61 : SchedWriteRes<[ICXPort5,ICXPort015]> {
let Latency = 5;
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
index b1dd52da3fa23..9d7069a277eb6 100644
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -736,14 +736,6 @@ def SBWriteResGroup29_2 : SchedWriteRes<[SBPort5,SBPort015]> {
}
def: InstRW<[SBWriteResGroup29_2], (instrs PAUSE)>;
-def SBWriteResGroup31 : SchedWriteRes<[SBPort23]> {
- let Latency = 5;
- let NumMicroOps = 1;
- let ResourceCycles = [1];
-}
-def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm(8|16|32)",
- "MOVZX(16|32|64)rm(8|16)")>;
-
def SBWriteResGroup76 : SchedWriteRes<[SBPort05]> {
let Latency = 5;
let NumMicroOps = 8;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
index 59d7c61a3f08a..e92a5a87c7da6 100644
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -928,14 +928,6 @@ def SKLWriteResGroup57 : SchedWriteRes<[SKLPort1,SKLPort6,SKLPort0156]> {
}
def: InstRW<[SKLWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
-def SKLWriteResGroup58 : SchedWriteRes<[SKLPort23]> {
- let Latency = 5;
- let NumMicroOps = 1;
- let ResourceCycles = [1];
-}
-def: InstRW<[SKLWriteResGroup58], (instregex "MOVSX(16|32|64)rm(8|16|32)",
- "MOVZX(16|32|64)rm(8|16)")>;
-
def SKLWriteResGroup60 : SchedWriteRes<[SKLPort5,SKLPort015]> {
let Latency = 5;
let NumMicroOps = 2;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index da1b47e98d774..5ee909b49d098 100644
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -1048,14 +1048,6 @@ def SKXWriteResGroup57 : SchedWriteRes<[SKXPort1,SKXPort6,SKXPort0156]> {
}
def: InstRW<[SKXWriteResGroup57], (instregex "LAR(16|32|64)rr")>;
-def SKXWriteResGroup58 : SchedWriteRes<[SKXPort23]> {
- let Latency = 5;
- let NumMicroOps = 1;
- let ResourceCycles = [1];
-}
-def: InstRW<[SKXWriteResGroup58], (instregex "MOVSX(16|32|64)rm(8|16|32)",
- "MOVZX(16|32|64)rm(8|16)")>;
-
def SKXWriteResGroup61 : SchedWriteRes<[SKXPort5,SKXPort015]> {
let Latency = 5;
let NumMicroOps = 2;
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td
index d6ea83b52257d..705100d85f361 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver1.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td
@@ -523,10 +523,6 @@ def : SchedAlias<WriteSTMXCSR, ZnWriteMicrocoded>;
// r16,m.
def : InstRW<[WriteALULd, ReadAfterLd], (instrs MOV16rm)>;
-// MOVSX, MOVZX.
-// r,m.
-def : InstRW<[WriteLoad], (instregex "MOV(S|Z)X32rm(8|16)")>;
-
// XCHG.
// r,m.
def ZnWriteXCHGrm : SchedWriteRes<[ZnAGU, ZnALU]> {
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver2.td b/llvm/lib/Target/X86/X86ScheduleZnver2.td
index 9ebedb76b9e37..87a953cef33a7 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver2.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver2.td
@@ -522,10 +522,6 @@ def : SchedAlias<WriteSTMXCSR, Zn2WriteMicrocoded>;
// r16,m.
def : InstRW<[WriteALULd, ReadAfterLd], (instregex "MOV16rm")>;
-// MOVSX, MOVZX.
-// r,m.
-def : InstRW<[WriteLoad], (instregex "MOV(S|Z)X32rm(8|16)")>;
-
// XCHG.
// r,r.
def Zn2WriteXCHG : SchedWriteRes<[Zn2ALU]> {
diff --git a/llvm/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s
index b60a873b59d4c..20828a798b297 100644
--- a/llvm/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/BdVer2/resources-x86_64.s
@@ -1396,26 +1396,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 100 0.50 U movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: 1 1 1.00 movsbw %al, %di
# CHECK-NEXT: 1 1 1.00 movzbw %al, %di
-# CHECK-NEXT: 1 5 1.50 * movsbw (%rax), %di
-# CHECK-NEXT: 1 5 1.50 * movzbw (%rax), %di
+# CHECK-NEXT: 1 5 1.00 * movsbw (%rax), %di
+# CHECK-NEXT: 1 5 1.00 * movzbw (%rax), %di
# CHECK-NEXT: 1 1 1.00 movsbl %al, %edi
# CHECK-NEXT: 1 1 1.00 movzbl %al, %edi
-# CHECK-NEXT: 1 5 1.50 * movsbl (%rax), %edi
-# CHECK-NEXT: 1 5 1.50 * movzbl (%rax), %edi
+# CHECK-NEXT: 1 5 1.00 * movsbl (%rax), %edi
+# CHECK-NEXT: 1 5 1.00 * movzbl (%rax), %edi
# CHECK-NEXT: 1 1 1.00 movsbq %al, %rdi
# CHECK-NEXT: 1 1 1.00 movzbq %al, %rdi
-# CHECK-NEXT: 1 5 1.50 * movsbq (%rax), %rdi
-# CHECK-NEXT: 1 5 1.50 * movzbq (%rax), %rdi
+# CHECK-NEXT: 1 5 1.00 * movsbq (%rax), %rdi
+# CHECK-NEXT: 1 5 1.00 * movzbq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 movswl %ax, %edi
# CHECK-NEXT: 1 1 1.00 movzwl %ax, %edi
-# CHECK-NEXT: 1 5 1.50 * movswl (%rax), %edi
-# CHECK-NEXT: 1 5 1.50 * movzwl (%rax), %edi
+# CHECK-NEXT: 1 5 1.00 * movswl (%rax), %edi
+# CHECK-NEXT: 1 5 1.00 * movzwl (%rax), %edi
# CHECK-NEXT: 1 1 1.00 movswq %ax, %rdi
# CHECK-NEXT: 1 1 1.00 movzwq %ax, %rdi
-# CHECK-NEXT: 1 5 1.50 * movswq (%rax), %rdi
-# CHECK-NEXT: 1 5 1.50 * movzwq (%rax), %rdi
+# CHECK-NEXT: 1 5 1.00 * movswq (%rax), %rdi
+# CHECK-NEXT: 1 5 1.00 * movzwq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 movslq %eax, %rdi
-# CHECK-NEXT: 1 5 1.50 * movslq (%rax), %rdi
+# CHECK-NEXT: 1 5 1.00 * movslq (%rax), %rdi
# CHECK-NEXT: 1 4 4.00 mulb %dil
# CHECK-NEXT: 1 8 4.00 * mulb (%rax)
# CHECK-NEXT: 2 4 5.00 mulw %si
@@ -1968,7 +1968,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18]
-# CHECK-NEXT: 769.50 769.50 - - 246.00 1815.50 2220.50 - - - - - - - - - - - - 616.50 616.50 136.00 306.00
+# CHECK-NEXT: 764.00 764.00 - - 246.00 1804.50 2209.50 - - - - - - - - - - - - 611.00 611.00 136.00 306.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
@@ -2338,26 +2338,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movsbw %al, %di
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movzbw %al, %di
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movsbw (%rax), %di
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movzbw (%rax), %di
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movsbw (%rax), %di
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movzbw (%rax), %di
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movsbl %al, %edi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movzbl %al, %edi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movsbl (%rax), %edi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movzbl (%rax), %edi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movsbl (%rax), %edi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movzbl (%rax), %edi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movsbq %al, %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movzbq %al, %rdi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movsbq (%rax), %rdi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movzbq (%rax), %rdi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movsbq (%rax), %rdi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movzbq (%rax), %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movswl %ax, %edi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movzwl %ax, %edi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movswl (%rax), %edi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movzwl (%rax), %edi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movswl (%rax), %edi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movzwl (%rax), %edi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movswq %ax, %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movzwq %ax, %rdi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movswq (%rax), %rdi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movzwq (%rax), %rdi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movswq (%rax), %rdi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movzwq (%rax), %rdi
# CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - movslq %eax, %rdi
-# CHECK-NEXT: 1.50 1.50 - - - 1.00 1.00 - - - - - - - - - - - - 1.50 1.50 - - movslq (%rax), %rdi
+# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - - - - - - 1.00 1.00 - - movslq (%rax), %rdi
# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - - 4.00 - mulb %dil
# CHECK-NEXT: 1.50 1.50 - - - - 1.00 - - - - - - - - - - - - 1.50 1.50 4.00 - mulb (%rax)
# CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - - 5.00 - mulw %si
diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
index b0c89f017731d..6d750008119ad 100644
--- a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s
@@ -1396,26 +1396,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 100 0.50 U movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: 1 1 0.50 movsbw %al, %di
# CHECK-NEXT: 1 1 0.50 movzbw %al, %di
-# CHECK-NEXT: 1 4 1.00 * movsbw (%rax), %di
-# CHECK-NEXT: 1 4 1.00 * movzbw (%rax), %di
+# CHECK-NEXT: 1 3 1.00 * movsbw (%rax), %di
+# CHECK-NEXT: 1 3 1.00 * movzbw (%rax), %di
# CHECK-NEXT: 1 1 0.50 movsbl %al, %edi
# CHECK-NEXT: 1 1 0.50 movzbl %al, %edi
-# CHECK-NEXT: 1 4 1.00 * movsbl (%rax), %edi
-# CHECK-NEXT: 1 4 1.00 * movzbl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movsbl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movzbl (%rax), %edi
# CHECK-NEXT: 1 1 0.50 movsbq %al, %rdi
# CHECK-NEXT: 1 1 0.50 movzbq %al, %rdi
-# CHECK-NEXT: 1 4 1.00 * movsbq (%rax), %rdi
-# CHECK-NEXT: 1 4 1.00 * movzbq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movsbq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movzbq (%rax), %rdi
# CHECK-NEXT: 1 1 0.50 movswl %ax, %edi
# CHECK-NEXT: 1 1 0.50 movzwl %ax, %edi
-# CHECK-NEXT: 1 4 1.00 * movswl (%rax), %edi
-# CHECK-NEXT: 1 4 1.00 * movzwl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movswl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movzwl (%rax), %edi
# CHECK-NEXT: 1 1 0.50 movswq %ax, %rdi
# CHECK-NEXT: 1 1 0.50 movzwq %ax, %rdi
-# CHECK-NEXT: 1 4 1.00 * movswq (%rax), %rdi
-# CHECK-NEXT: 1 4 1.00 * movzwq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movswq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movzwq (%rax), %rdi
# CHECK-NEXT: 1 1 0.50 movslq %eax, %rdi
-# CHECK-NEXT: 1 4 1.00 * movslq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movslq (%rax), %rdi
# CHECK-NEXT: 1 3 1.00 mulb %dil
# CHECK-NEXT: 1 6 1.00 * mulb (%rax)
# CHECK-NEXT: 3 3 3.00 mulw %si
@@ -1959,7 +1959,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
-# CHECK-NEXT: 722.50 772.50 380.00 - - - - 992.00 80.00 893.00 - - - -
+# CHECK-NEXT: 717.00 767.00 380.00 - - - - 992.00 80.00 893.00 - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:
@@ -2329,26 +2329,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movsbw %al, %di
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movzbw %al, %di
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movsbw (%rax), %di
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movzbw (%rax), %di
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movsbw (%rax), %di
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movzbw (%rax), %di
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movsbl %al, %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movzbl %al, %edi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movsbl (%rax), %edi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movzbl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movsbl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movzbl (%rax), %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movsbq %al, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movzbq %al, %rdi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movsbq (%rax), %rdi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movzbq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movsbq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movzbq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movswl %ax, %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movzwl %ax, %edi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movswl (%rax), %edi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movzwl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movswl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movzwl (%rax), %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movswq %ax, %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movzwq %ax, %rdi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movswq (%rax), %rdi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movzwq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movswq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movzwq (%rax), %rdi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - movslq %eax, %rdi
-# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - movslq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 - - - - - - movslq (%rax), %rdi
# CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - mulb %dil
# CHECK-NEXT: - 1.00 - - - - - 1.00 1.00 - - - - - mulb (%rax)
# CHECK-NEXT: - 1.00 - - - - - - 3.00 - - - - - mulw %si
diff --git a/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
index f48ac11746092..1491da0f17a83 100644
--- a/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
@@ -1396,26 +1396,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 100 1.00 U movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: 1 1 0.50 movsbw %al, %di
# CHECK-NEXT: 1 1 0.50 movzbw %al, %di
-# CHECK-NEXT: 1 4 1.00 * movsbw (%rax), %di
-# CHECK-NEXT: 1 4 1.00 * movzbw (%rax), %di
+# CHECK-NEXT: 1 3 1.00 * movsbw (%rax), %di
+# CHECK-NEXT: 1 3 1.00 * movzbw (%rax), %di
# CHECK-NEXT: 1 1 0.50 movsbl %al, %edi
# CHECK-NEXT: 1 1 0.50 movzbl %al, %edi
-# CHECK-NEXT: 1 4 1.00 * movsbl (%rax), %edi
-# CHECK-NEXT: 1 4 1.00 * movzbl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movsbl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movzbl (%rax), %edi
# CHECK-NEXT: 1 1 0.50 movsbq %al, %rdi
# CHECK-NEXT: 1 1 0.50 movzbq %al, %rdi
-# CHECK-NEXT: 1 4 1.00 * movsbq (%rax), %rdi
-# CHECK-NEXT: 1 4 1.00 * movzbq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movsbq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movzbq (%rax), %rdi
# CHECK-NEXT: 1 1 0.50 movswl %ax, %edi
# CHECK-NEXT: 1 1 0.50 movzwl %ax, %edi
-# CHECK-NEXT: 1 4 1.00 * movswl (%rax), %edi
-# CHECK-NEXT: 1 4 1.00 * movzwl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movswl (%rax), %edi
+# CHECK-NEXT: 1 3 1.00 * movzwl (%rax), %edi
# CHECK-NEXT: 1 1 0.50 movswq %ax, %rdi
# CHECK-NEXT: 1 1 0.50 movzwq %ax, %rdi
-# CHECK-NEXT: 1 4 1.00 * movswq (%rax), %rdi
-# CHECK-NEXT: 1 4 1.00 * movzwq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movswq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movzwq (%rax), %rdi
# CHECK-NEXT: 1 1 0.50 movslq %eax, %rdi
-# CHECK-NEXT: 1 4 1.00 * movslq (%rax), %rdi
+# CHECK-NEXT: 1 3 1.00 * movslq (%rax), %rdi
# CHECK-NEXT: 3 5 5.00 mulb %dil
# CHECK-NEXT: 3 8 5.00 * mulb (%rax)
# CHECK-NEXT: 4 5 5.00 mulw %si
@@ -1953,7 +1953,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
-# CHECK-NEXT: 400.00 - - 49.00 - 660.00 598.00 835.00
+# CHECK-NEXT: 400.00 - - 49.00 - 654.50 592.50 835.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
@@ -2323,26 +2323,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - - 1.00 - - - - movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: - - - - - 0.50 0.50 - movsbw %al, %di
# CHECK-NEXT: - - - - - 0.50 0.50 - movzbw %al, %di
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movsbw (%rax), %di
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movzbw (%rax), %di
+# CHECK-NEXT: - - - - - - - 1.00 movsbw (%rax), %di
+# CHECK-NEXT: - - - - - - - 1.00 movzbw (%rax), %di
# CHECK-NEXT: - - - - - 0.50 0.50 - movsbl %al, %edi
# CHECK-NEXT: - - - - - 0.50 0.50 - movzbl %al, %edi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movsbl (%rax), %edi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movzbl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 movsbl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 movzbl (%rax), %edi
# CHECK-NEXT: - - - - - 0.50 0.50 - movsbq %al, %rdi
# CHECK-NEXT: - - - - - 0.50 0.50 - movzbq %al, %rdi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movsbq (%rax), %rdi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movzbq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 movsbq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 movzbq (%rax), %rdi
# CHECK-NEXT: - - - - - 0.50 0.50 - movswl %ax, %edi
# CHECK-NEXT: - - - - - 0.50 0.50 - movzwl %ax, %edi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movswl (%rax), %edi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movzwl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 movswl (%rax), %edi
+# CHECK-NEXT: - - - - - - - 1.00 movzwl (%rax), %edi
# CHECK-NEXT: - - - - - 0.50 0.50 - movswq %ax, %rdi
# CHECK-NEXT: - - - - - 0.50 0.50 - movzwq %ax, %rdi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movswq (%rax), %rdi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movzwq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 movswq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 movzwq (%rax), %rdi
# CHECK-NEXT: - - - - - 0.50 0.50 - movslq %eax, %rdi
-# CHECK-NEXT: - - - - - 0.50 0.50 1.00 movslq (%rax), %rdi
+# CHECK-NEXT: - - - - - - - 1.00 movslq (%rax), %rdi
# CHECK-NEXT: - - - - - - 5.00 - mulb %dil
# CHECK-NEXT: - - - - - - 5.00 1.00 mulb (%rax)
# CHECK-NEXT: - - - - - - 5.00 - mulw %si
diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s
index 7eadac52bfb3a..90e7553f092a7 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-x86_64.s
@@ -1396,26 +1396,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 100 0.25 U movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: 1 1 0.25 movsbw %al, %di
# CHECK-NEXT: 1 1 0.25 movzbw %al, %di
-# CHECK-NEXT: 2 5 0.50 * movsbw (%rax), %di
-# CHECK-NEXT: 2 5 0.50 * movzbw (%rax), %di
+# CHECK-NEXT: 1 4 0.50 * movsbw (%rax), %di
+# CHECK-NEXT: 1 4 0.50 * movzbw (%rax), %di
# CHECK-NEXT: 1 1 0.25 movsbl %al, %edi
# CHECK-NEXT: 1 1 0.25 movzbl %al, %edi
# CHECK-NEXT: 1 4 0.50 * movsbl (%rax), %edi
# CHECK-NEXT: 1 4 0.50 * movzbl (%rax), %edi
# CHECK-NEXT: 1 1 0.25 movsbq %al, %rdi
# CHECK-NEXT: 1 1 0.25 movzbq %al, %rdi
-# CHECK-NEXT: 2 5 0.50 * movsbq (%rax), %rdi
-# CHECK-NEXT: 2 5 0.50 * movzbq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.50 * movsbq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.50 * movzbq (%rax), %rdi
# CHECK-NEXT: 1 1 0.25 movswl %ax, %edi
# CHECK-NEXT: 1 1 0.25 movzwl %ax, %edi
# CHECK-NEXT: 1 4 0.50 * movswl (%rax), %edi
# CHECK-NEXT: 1 4 0.50 * movzwl (%rax), %edi
# CHECK-NEXT: 1 1 0.25 movswq %ax, %rdi
# CHECK-NEXT: 1 1 0.25 movzwq %ax, %rdi
-# CHECK-NEXT: 2 5 0.50 * movswq (%rax), %rdi
-# CHECK-NEXT: 2 5 0.50 * movzwq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.50 * movswq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.50 * movzwq (%rax), %rdi
# CHECK-NEXT: 1 1 0.25 movslq %eax, %rdi
-# CHECK-NEXT: 2 5 0.50 * movslq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.50 * movslq (%rax), %rdi
# CHECK-NEXT: 1 4 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 1 3 1.00 mulw %si
@@ -1957,7 +1957,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]
-# CHECK-NEXT: 233.00 233.00 230.50 264.50 246.50 230.50 392.00 - - - - 34.00
+# CHECK-NEXT: 233.00 233.00 228.75 262.75 244.75 228.75 392.00 - - - - 34.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions:
@@ -2327,26 +2327,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - - - - - - - - - - - movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movsbw %al, %di
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movzbw %al, %di
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movsbw (%rax), %di
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movzbw (%rax), %di
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movsbw (%rax), %di
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movzbw (%rax), %di
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movsbl %al, %edi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movzbl %al, %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movsbl (%rax), %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movzbl (%rax), %edi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movsbq %al, %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movzbq %al, %rdi
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movsbq (%rax), %rdi
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movzbq (%rax), %rdi
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movsbq (%rax), %rdi
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movzbq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movswl %ax, %edi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movzwl %ax, %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movswl (%rax), %edi
# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movzwl (%rax), %edi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movswq %ax, %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movzwq %ax, %rdi
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movswq (%rax), %rdi
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movzwq (%rax), %rdi
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movswq (%rax), %rdi
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movzwq (%rax), %rdi
# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - movslq %eax, %rdi
-# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - movslq (%rax), %rdi
+# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - movslq (%rax), %rdi
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulb %dil
# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulb (%rax)
# CHECK-NEXT: - - - 1.00 - - - - - - - 1.00 mulw %si
diff --git a/llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s
index 3cd41c176ce04..2bef39cec5598 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s
@@ -1198,26 +1198,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 100 0.25 U movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: 1 1 0.25 movsbw %al, %di
# CHECK-NEXT: 1 1 0.25 movzbw %al, %di
-# CHECK-NEXT: 2 5 0.33 * movsbw (%rax), %di
-# CHECK-NEXT: 2 5 0.33 * movzbw (%rax), %di
+# CHECK-NEXT: 1 4 0.33 * movsbw (%rax), %di
+# CHECK-NEXT: 1 4 0.33 * movzbw (%rax), %di
# CHECK-NEXT: 1 1 0.25 movsbl %al, %edi
# CHECK-NEXT: 1 1 0.25 movzbl %al, %edi
# CHECK-NEXT: 1 4 0.33 * movsbl (%rax), %edi
# CHECK-NEXT: 1 4 0.33 * movzbl (%rax), %edi
# CHECK-NEXT: 1 1 0.25 movsbq %al, %rdi
# CHECK-NEXT: 1 1 0.25 movzbq %al, %rdi
-# CHECK-NEXT: 2 5 0.33 * movsbq (%rax), %rdi
-# CHECK-NEXT: 2 5 0.33 * movzbq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.33 * movsbq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.33 * movzbq (%rax), %rdi
# CHECK-NEXT: 1 1 0.25 movswl %ax, %edi
# CHECK-NEXT: 1 1 0.25 movzwl %ax, %edi
# CHECK-NEXT: 1 4 0.33 * movswl (%rax), %edi
# CHECK-NEXT: 1 4 0.33 * movzwl (%rax), %edi
# CHECK-NEXT: 1 1 0.25 movswq %ax, %rdi
# CHECK-NEXT: 1 1 0.25 movzwq %ax, %rdi
-# CHECK-NEXT: 2 5 0.33 * movswq (%rax), %rdi
-# CHECK-NEXT: 2 5 0.33 * movzwq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.33 * movswq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.33 * movzwq (%rax), %rdi
# CHECK-NEXT: 1 1 0.25 movslq %eax, %rdi
-# CHECK-NEXT: 2 5 0.33 * movslq (%rax), %rdi
+# CHECK-NEXT: 1 4 0.33 * movslq (%rax), %rdi
# CHECK-NEXT: 1 4 1.00 mulb %dil
# CHECK-NEXT: 2 8 1.00 * mulb (%rax)
# CHECK-NEXT: 1 3 1.00 mulw %si
@@ -1696,7 +1696,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
-# CHECK-NEXT: 116.00 116.00 116.00 197.00 231.00 213.00 197.00 392.00 - - - - 34.00
+# CHECK-NEXT: 116.00 116.00 116.00 195.25 229.25 211.25 195.25 392.00 - - - - 34.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
@@ -1999,26 +1999,26 @@ xorq (%rax), %rdi
# CHECK-NEXT: - - - - - - - - - - - - - movsq (%rsi), %es:(%rdi)
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movsbw %al, %di
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzbw %al, %di
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movsbw (%rax), %di
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movzbw (%rax), %di
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movsbw (%rax), %di
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzbw (%rax), %di
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movsbl %al, %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzbl %al, %edi
# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movsbl (%rax), %edi
# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzbl (%rax), %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movsbq %al, %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzbq %al, %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movsbq (%rax), %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movzbq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movsbq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzbq (%rax), %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movswl %ax, %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzwl %ax, %edi
# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movswl (%rax), %edi
# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzwl (%rax), %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movswq %ax, %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movzwq %ax, %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movswq (%rax), %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movzwq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movswq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movzwq (%rax), %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - movslq %eax, %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - movslq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - movslq (%rax), %rdi
# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 mulb %dil
# CHECK-NEXT: 0.33 0.33 0.33 - 1.00 - - - - - - - 1.00 mulb (%rax)
# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 mulw %si
diff --git a/llvm/test/tools/llvm-mca/X86/Znver3/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/Znver3/resources-x86_64.s
index 0783c5decbb88..9a201b0219784 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver3/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver3/resources-x86_64.s
@@ -1706,7 +1706,7 @@ xorq (%rax), %rdi
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
-# CHECK-NEXT: 176.00 176.00 176.00 1669.50 1824.50 1704.50 1467.50 - - - - - - - - 175.33 175.33 175.33 109.00 109.00 109.00 99.50 99.50
+# CHECK-NEXT: 176.00 176.00 176.00 1667.25 1822.25 1702.25 1465.25 - - - - - - - - 175.33 175.33 175.33 109.00 109.00 109.00 99.50 99.50
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
@@ -2013,22 +2013,22 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1.00 1.00 1.00 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzbw (%rax), %di
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movsbl %al, %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movzbl %al, %edi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movsbl (%rax), %edi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzbl (%rax), %edi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movsbl (%rax), %edi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzbl (%rax), %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movsbq %al, %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movzbq %al, %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movsbq (%rax), %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzbq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movsbq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzbq (%rax), %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movswl %ax, %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movzwl %ax, %edi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movswl (%rax), %edi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzwl (%rax), %edi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movswl (%rax), %edi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzwl (%rax), %edi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movswq %ax, %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movzwq %ax, %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movswq (%rax), %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzwq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movswq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movzwq (%rax), %rdi
# CHECK-NEXT: - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - - - - - - movslq %eax, %rdi
-# CHECK-NEXT: 0.33 0.33 0.33 0.25 0.25 0.25 0.25 - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movslq (%rax), %rdi
+# CHECK-NEXT: 0.33 0.33 0.33 - - - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - movslq (%rax), %rdi
# CHECK-NEXT: - - - - 3.00 - - - - - - - - - - - - - - - - - - mulb %dil
# CHECK-NEXT: 0.33 0.33 0.33 - 3.00 - - - - - - - - - - 0.33 0.33 0.33 0.33 0.33 0.33 - - mulb (%rax)
# CHECK-NEXT: - - - - 3.00 - - - - - - - - - - - - - - - - - - mulw %si
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