[llvm] 92c5bcb - [InstCombine] add tests for zext of and of trunc; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2022-11-06T09:07:17-05:00
New Revision: 92c5bcb7bce77ba2b9612169cab12fa52737e15a

URL: https://github.com/llvm/llvm-project/commit/92c5bcb7bce77ba2b9612169cab12fa52737e15a
DIFF: https://github.com/llvm/llvm-project/commit/92c5bcb7bce77ba2b9612169cab12fa52737e15a.diff

LOG: [InstCombine] add tests for zext of and of trunc; NFC

The basic one-use version of this sequence is reduced,
but we don't transform these currently.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/zext.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/zext.ll b/llvm/test/Transforms/InstCombine/zext.ll
index 765ae1a1b64a5..06188de5751ed 100644
--- a/llvm/test/Transforms/InstCombine/zext.ll
+++ b/llvm/test/Transforms/InstCombine/zext.ll
@@ -1,6 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
+declare void @use1(i1)
+declare void @use32(i32)
+declare void @use_vec(<2 x i9>)
+
 define i64 @test_sext_zext(i16 %A) {
 ; CHECK-LABEL: @test_sext_zext(
 ; CHECK-NEXT:    [[C2:%.*]] = zext i16 [[A:%.*]] to i64
@@ -172,9 +176,6 @@ define i47 @sext_zext_apint2(i11 %A) {
   ret i47 %c2
 }
 
-declare void @use1(i1)
-declare void @use32(i32)
-
 define i32 @masked_bit_set(i32 %x, i32 %y) {
 ; CHECK-LABEL: @masked_bit_set(
 ; CHECK-NEXT:    [[TMP1:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
@@ -535,3 +536,97 @@ join:
   %conv4 = zext i1 %x1 to i16
   ret i16 %conv4
 }
+
+define i64 @and_trunc_extra_use1(i64 %x, i32 %y) {
+; CHECK-LABEL: @and_trunc_extra_use1(
+; CHECK-NEXT:    [[T:%.*]] = trunc i64 [[X:%.*]] to i32
+; CHECK-NEXT:    call void @use32(i32 [[T]])
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[T]], [[Y:%.*]]
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[A]] to i64
+; CHECK-NEXT:    ret i64 [[Z]]
+;
+  %t = trunc i64 %x to i32
+  call void @use32(i32 %t)
+  %a = and i32 %t, %y
+  %z = zext i32 %a to i64
+  ret i64 %z
+}
+
+define i64 @and_trunc_extra_use1_commute(i64 %x, i32 %p) {
+; CHECK-LABEL: @and_trunc_extra_use1_commute(
+; CHECK-NEXT:    [[Y:%.*]] = mul i32 [[P:%.*]], [[P]]
+; CHECK-NEXT:    [[T:%.*]] = trunc i64 [[X:%.*]] to i32
+; CHECK-NEXT:    call void @use32(i32 [[T]])
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[Y]], [[T]]
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[A]] to i64
+; CHECK-NEXT:    ret i64 [[Z]]
+;
+  %y = mul i32 %p, %p ; thwart complexity-based canonicalization
+  %t = trunc i64 %x to i32
+  call void @use32(i32 %t)
+  %a = and i32 %y, %t
+  %z = zext i32 %a to i64
+  ret i64 %z
+}
+
+define i64 @and_trunc_extra_use2(i64 %x, i32 %y) {
+; CHECK-LABEL: @and_trunc_extra_use2(
+; CHECK-NEXT:    [[T:%.*]] = trunc i64 [[X:%.*]] to i32
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[T]], [[Y:%.*]]
+; CHECK-NEXT:    call void @use32(i32 [[A]])
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[A]] to i64
+; CHECK-NEXT:    ret i64 [[Z]]
+;
+  %t = trunc i64 %x to i32
+  %a = and i32 %t, %y
+  call void @use32(i32 %a)
+  %z = zext i32 %a to i64
+  ret i64 %z
+}
+
+define i64 @and_trunc_extra_use2_constant(i64 %x) {
+; CHECK-LABEL: @and_trunc_extra_use2_constant(
+; CHECK-NEXT:    [[T:%.*]] = trunc i64 [[X:%.*]] to i32
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[T]], 42
+; CHECK-NEXT:    call void @use32(i32 [[A]])
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[A]] to i64
+; CHECK-NEXT:    ret i64 [[Z]]
+;
+  %t = trunc i64 %x to i32
+  %a = and i32 %t, 42
+  call void @use32(i32 %a)
+  %z = zext i32 %a to i64
+  ret i64 %z
+}
+
+define <2 x i17> @and_trunc_extra_use3_constant_vec(<2 x i17> %x) {
+; CHECK-LABEL: @and_trunc_extra_use3_constant_vec(
+; CHECK-NEXT:    [[T:%.*]] = trunc <2 x i17> [[X:%.*]] to <2 x i9>
+; CHECK-NEXT:    call void @use_vec(<2 x i9> [[T]])
+; CHECK-NEXT:    [[A:%.*]] = and <2 x i9> [[T]], <i9 42, i9 -3>
+; CHECK-NEXT:    call void @use_vec(<2 x i9> [[A]])
+; CHECK-NEXT:    [[Z:%.*]] = zext <2 x i9> [[A]] to <2 x i17>
+; CHECK-NEXT:    ret <2 x i17> [[Z]]
+;
+  %t = trunc <2 x i17> %x to <2 x i9>
+  call void @use_vec(<2 x i9> %t)
+  %a = and <2 x i9> %t, <i9 42, i9 -3>
+  call void @use_vec(<2 x i9> %a)
+  %z = zext <2 x i9> %a to <2 x i17>
+  ret <2 x i17> %z
+}
+
+define i64 @and_trunc_extra_use1_wider_src(i65 %x, i32 %y) {
+; CHECK-LABEL: @and_trunc_extra_use1_wider_src(
+; CHECK-NEXT:    [[T:%.*]] = trunc i65 [[X:%.*]] to i32
+; CHECK-NEXT:    call void @use32(i32 [[T]])
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[T]], [[Y:%.*]]
+; CHECK-NEXT:    [[Z:%.*]] = zext i32 [[A]] to i64
+; CHECK-NEXT:    ret i64 [[Z]]
+;
+  %t = trunc i65 %x to i32
+  call void @use32(i32 %t)
+  %a = and i32 %t, %y
+  %z = zext i32 %a to i64
+  ret i64 %z
+}