[PATCH] D136014: Recommit [AArch64] Improve codegen for shifted mask op
chenglin.bi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 5 02:54:16 PDT 2022
bcl5980 added a comment.
In D136014#3909891 <https://reviews.llvm.org/D136014#3909891>, @dmgreen wrote:
> Yes, please add a test with different bitwidths. It's not obvious what is changing types. Is it during legalization?
The type change comes from ShrinkDemandedOp in truncate store. A normal different type case can't reproduce the issue. I also try to fix it the shrink demanded op. But that's another individual patch. I am not sure which patch need to include the crash test for now.
> If we know that they are always <= 64, it could just use getZExtValue too.
Thanks for the mention.Yeah, zext value should enough.
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https://reviews.llvm.org/D136014/new/
https://reviews.llvm.org/D136014
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